Lines Matching full:upper
116 #define SPRN_DBAT0U 0x218 /* Data BAT 0 Upper Register */
118 #define SPRN_DBAT1U 0x21A /* Data BAT 1 Upper Register */
120 #define SPRN_DBAT2U 0x21C /* Data BAT 2 Upper Register */
122 #define SPRN_DBAT3U 0x21E /* Data BAT 3 Upper Register */
124 #define SPRN_DBAT4U 0x238 /* Data BAT 4 Upper Register */
126 #define SPRN_DBAT5U 0x23A /* Data BAT 5 Upper Register */
128 #define SPRN_DBAT6U 0x23C /* Data BAT 6 Upper Register */
278 #define SPRN_IBAT0U 0x210 /* Instruction BAT 0 Upper Register */
280 #define SPRN_IBAT1U 0x212 /* Instruction BAT 1 Upper Register */
282 #define SPRN_IBAT2U 0x214 /* Instruction BAT 2 Upper Register */
284 #define SPRN_IBAT3U 0x216 /* Instruction BAT 3 Upper Register */
286 #define SPRN_IBAT4U 0x230 /* Instruction BAT 4 Upper Register */
288 #define SPRN_IBAT5U 0x232 /* Instruction BAT 5 Upper Register */
290 #define SPRN_IBAT6U 0x234 /* Instruction BAT 6 Upper Register */
292 #define SPRN_IBAT7U 0x236 /* Instruction BAT 7 Upper Register */
327 #define SPRN_PBU1 0x3FD /* Protection Bound Upper 1 */
328 #define SPRN_PBU2 0x3FF /* Protection Bound Upper 2 */
375 #define SPRN_TBRU 0x10D /* Time Base Read Upper Register */
377 #define SPRN_TBWU 0x11D /* Time Base Write Upper Register */
556 #define DBAT0U SPRN_DBAT0U /* Data BAT 0 Upper Register */
558 #define DBAT1U SPRN_DBAT1U /* Data BAT 1 Upper Register */
560 #define DBAT2U SPRN_DBAT2U /* Data BAT 2 Upper Register */
562 #define DBAT3U SPRN_DBAT3U /* Data BAT 3 Upper Register */
564 #define DBAT4U SPRN_DBAT4U /* Data BAT 4 Upper Register */
566 #define DBAT5U SPRN_DBAT5U /* Data BAT 5 Upper Register */
568 #define DBAT6U SPRN_DBAT6U /* Data BAT 6 Upper Register */
570 #define DBAT7U SPRN_DBAT7U /* Data BAT 7 Upper Register */
588 #define IBAT0U SPRN_IBAT0U /* Instruction BAT 0 Upper Register */
590 #define IBAT1U SPRN_IBAT1U /* Instruction BAT 1 Upper Register */
592 #define IBAT2U SPRN_IBAT2U /* Instruction BAT 2 Upper Register */
594 #define IBAT3U SPRN_IBAT3U /* Instruction BAT 3 Upper Register */
596 #define IBAT4U SPRN_IBAT4U /* Instruction BAT 4 Upper Register */
598 #define IBAT5U SPRN_IBAT5U /* Instruction BAT 5 Upper Register */
600 #define IBAT6U SPRN_IBAT6U /* Instruction BAT 6 Upper Register */
638 #define TBRU SPRN_TBRU /* Time Base Read Upper Register */
640 #define TBWU SPRN_TBWU /* Time Base Write Upper Register */