Lines Matching full:7

103 ;//     <o4.6..7>     LCD_DMA    <0=> 1st  <1=> 2nd  <2=> 3rd  <3=> 4th
121 ;// <o1.21> EINT4567 <i> External Interrupt 4/5/6/7
135 ;// <o1.7> URXD0 <i> UART0 Rx Interrupt
183 ;// <o2.7> BDMA0,1 <0=> Disable <1=> Enable
231 ;// <o0.6..7> Toch: Chip Select Hold on nOE
235 ;// <4=> 6 clk <5=> 8 clks <6=> 10 clks <7=> 14 clks
248 ;// <o8.7> ST: SRAM Type
257 ;// <o1.6..7> Toch: Chip Select Hold on nOE
261 ;// <4=> 6 clk <5=> 8 clks <6=> 10 clks <7=> 14 clks
283 ;// <o2.6..7> Toch: Chip Select Hold on nOE
287 ;// <4=> 6 clk <5=> 8 clks <6=> 10 clks <7=> 14 clks
309 ;// <o3.6..7> Toch: Chip Select Hold on nOE
313 ;// <4=> 6 clk <5=> 8 clks <6=> 10 clks <7=> 14 clks
335 ;// <o4.6..7> Toch: Chip Select Hold on nOE
339 ;// <4=> 6 clk <5=> 8 clks <6=> 10 clks <7=> 14 clks
361 ;// <o5.6..7> Toch: Chip Select Hold on nOE
365 ;// <4=> 6 clk <5=> 8 clks <6=> 10 clks <7=> 14 clks
373 ;// <o10.0..2> BK76MAP: Bank 6/7 Memory Map
374 ;// <0=> 32M <4=> 2M <5=> 4M <6=> 8M <7=> 16M
395 ;// <o6.6..7> Toch: Chip Select Hold on nOE
399 ;// <4=> 6 clk <5=> 8 clks <6=> 10 clks <7=> 14 clks
420 ;// <o10.4> SCLKEN: SCLK Selection (Bank 6/7)
429 ;// <o11.7..8> TM: Test Mode
436 ;// <h> Bank 7
437 ;// <o10.0..2> BK76MAP: Bank 6/7 Memory Map
438 ;// <0=> 32M <4=> 2M <5=> 4M <6=> 8M <7=> 16M
459 ;// <o7.6..7> Toch: Chip Select Hold on nOE
463 ;// <4=> 6 clk <5=> 8 clks <6=> 10 clks <7=> 14 clks
484 ;// <o10.4> SCLKEN: SCLK Selection (Bank 6/7)
493 ;// <o12.7..8> TM: Test Mode
512 ;// <0=> 4 clks <1=> 5 clks <2=> 6 clks <3=> 7 clks
562 ;// <o1.7> PA7 <0=> Output <1=> ADDR22
577 ;// <o1.7> PB7 <0=> Output <1=> nGCS2
589 ;// <o1.6..7> PC3 <0=> Input <1=> Output <2=> DATA19 <3=> IISCLK
610 ;// <o2.7> PC7 Pull-up <0=> Enabled <1=> Disabled
629 ;// <o1.6..7> PD3 <0=> Input <1=> Output <2=> VD3 <3=> Reserved
642 ;// <o2.7> PD7 Pull-up <0=> Enabled <1=> Disabled
653 ;// <o1.6..7> PE3 <0=> Input <1=> Output <2=> TOUT0 <3=> Reserved
667 ;// <o2.7> PE7 Pull-up <0=> Enabled <1=> Disabled
679 ;// <o1.6..7> PF3 <0=> Input <1=> Output <2=> nXBACK <3=> nXDACK0
682 ;// <4=> IISLRCK <5=> Reserved <6=> Reserved <7=> Reserved
684 ;// <4=> IISDO <5=> Reserved <6=> Reserved <7=> Reserved
686 ;// <4=> IISDI <5=> Reserved <6=> Reserved <7=> Reserved
688 ;// <4=> IISCLK <5=> Reserved <6=> Reserved <7=> Reserved
697 ;// <o2.7> PF7 Pull-up <0=> Enabled <1=> Disabled
709 ;// <o1.6..7> PG3 <0=> Input <1=> Output <2=> nRTS0 <3=> EINT3
722 ;// <o2.7> PG7 Pull-up <0=> Enabled <1=> Disabled
730 ;// <o1.0> SPUCR0: DATA[7:0] Pull-up Resistor