Lines Matching full:memory
45 ; * from external memory starting at address 0x80000000.
64 ;----------------------- Memory Definitions ------------------------------------
66 ; Internal Memory Base Addresses
71 ; External Memory Base Addresses
348 ;----------------------- Memory Accelerator Module (MAM) Definitions -----------
386 ;----------------------- External Memory Controller (EMC) Definitons -----------
454 ; External Memory Pins definitions
461 ;// External Memory Controller Setup (EMC) ---------------------------------
462 ;// <e> External Memory Controller Setup (EMC)
466 ;// <i> Controls operation of the memory controller
474 ;// <i> Configures operation of the memory controller
484 ;// Dynamic Memory Interface Setup ---------------------------------------
485 ;// <e> Dynamic Memory Interface Setup
488 ;// <h> Dynamic Memory Refresh Timer Register (EMCDynamicRefresh)
489 ;// <i> Configures dynamic memory refresh operation
495 ;// <h> Dynamic Memory Read Configuration Register (EMCDynamicReadConfig)
496 ;// <i> Configures the dynamic memory read strategy
505 ;// <h> Dynamic Memory Timings
506 ;// <h> Dynamic Memory Percentage Command Period Register (EMCDynamictRP)
511 ;// <h> Dynamic Memory Active to Precharge Command Period Register (EMCDynamictRAS)
516 ;// <h> Dynamic Memory Self-refresh Exit Time Register (EMCDynamictSREX)
522 ;// <h> Dynamic Memory Last Data Out to Active Time Register (EMCDynamictAPR)
527 ;// <h> Dynamic Memory Data-in to Active Command Time Register (EMCDynamictDAL)
532 ;// <h> Dynamic Memory Write Recovery Time Register (EMCDynamictWR)
537 ;// <h> Dynamic Memory Active to Active Command Period Register (EMCDynamictRC)
542 ;// <h> Dynamic Memory Auto-refresh Period Register (EMCDynamictRFC)
547 ;// <h> Dynamic Memory Exit Self-refresh Register (EMCDynamictXSR)
552 ;// <h> Dynamic Memory Active Bank A to Active Bank B Time Register (EMCDynamicRRD)
557 ;// <h> Dynamic Memory Load Mode Register to Active Command Time (EMCDynamictMRD)
578 ;// <h> Dynamic Memory Configuration Register (EMCDynamicConfig0)
579 ;// <i> Defines the configuration information for the dynamic memory CS0
585 ;// <o0.12> AM 12: External bus memory type
599 ;// <o0.3..4> MD: Memory device
606 ;// <h> Dynamic Memory RAS & CAS Delay register (EMCDynamicRASCAS0)
607 ;// <i> Controls the RAS and CAS latencies for the dynamic memory CS0
625 ;// <h> Dynamic Memory Configuration Register (EMCDynamicConfig1)
626 ;// <i> Defines the configuration information for the dynamic memory CS1
632 ;// <o0.12> AM 12: External bus memory type
646 ;// <o0.3..4> MD: Memory device
653 ;// <h> Dynamic Memory RAS & CAS Delay register (EMCDynamicRASCAS1)
654 ;// <i> Controls the RAS and CAS latencies for the dynamic memory CS1
671 ;// <h> Dynamic Memory Configuration Register (EMCDynamicConfig2)
672 ;// <i> Defines the configuration information for the dynamic memory CS2
678 ;// <o0.12> AM 12: External bus memory type
692 ;// <o0.3..4> MD: Memory device
699 ;// <h> Dynamic Memory RAS & CAS Delay register (EMCDynamicRASCAS2)
700 ;// <i> Controls the RAS and CAS latencies for the dynamic memory CS2
717 ;// <h> Dynamic Memory Configuration Register (EMCDynamicConfig3)
718 ;// <i> Defines the configuration information for the dynamic memory CS3
724 ;// <o0.12> AM 12: External bus memory type
738 ;// <o0.3..4> MD: Memory device
745 ;// <h> Dynamic Memory RAS & CAS Delay register (EMCDynamicRASCAS3)
746 ;// <i> Controls the RAS and CAS latencies for the dynamic memory CS3
762 ;// Static Memory Interface Setup ----------------------------------------
763 ;// <e> Static Memory Interface Setup
770 ;// <h> Static Memory Configuration Register (EMCStaticConfig0)
771 ;// <i> Defines the configuration information for the static memory CS0
782 ;// <o0.0..1> MW: Memory width
789 ;// <h> Static Memory Write Enable Delay Register (EMCStaticWaitWen0)
796 ;// <h> Static Memory Output Enable Delay register (EMCStaticWaitOen0)
803 ;// <h> Static Memory Read Delay Register (EMCStaticWaitRd0)
810 ;// <h> Static Memory Page Mode Read Delay Register (EMCStaticWaitPage0)
817 ;// <h> Static Memory Write Delay Register (EMCStaticWaitWr0)
824 ;// <h> Static Memory Turn Round Delay Register (EMCStaticWaitTurn0)
837 ;// <h> Static Memory Configuration Register (EMCStaticConfig1)
838 ;// <i> Defines the configuration information for the static memory CS1
849 ;// <o0.0..1> MW: Memory width
856 ;// <h> Static Memory Write Enable Delay Register (EMCStaticWaitWen1)
863 ;// <h> Static Memory Output Enable Delay register (EMCStaticWaitOen1)
870 ;// <h> Static Memory Read Delay Register (EMCStaticWaitRd1)
877 ;// <h> Static Memory Page Mode Read Delay Register (EMCStaticWaitPage0)
884 ;// <h> Static Memory Write Delay Register (EMCStaticWaitWr1)
891 ;// <h> Static Memory Turn Round Delay Register (EMCStaticWaitTurn1)
904 ;// <h> Static Memory Configuration Register (EMCStaticConfig2)
905 ;// <i> Defines the configuration information for the static memory CS2
916 ;// <o0.0..1> MW: Memory width
923 ;// <h> Static Memory Write Enable Delay Register (EMCStaticWaitWen2)
930 ;// <h> Static Memory Output Enable Delay register (EMCStaticWaitOen2)
937 ;// <h> Static Memory Read Delay Register (EMCStaticWaitRd2)
944 ;// <h> Static Memory Page Mode Read Delay Register (EMCStaticWaitPage2)
951 ;// <h> Static Memory Write Delay Register (EMCStaticWaitWr2)
958 ;// <h> Static Memory Turn Round Delay Register (EMCStaticWaitTurn2)
971 ;// <h> Static Memory Configuration Register (EMCStaticConfig3)
972 ;// <i> Defines the configuration information for the static memory CS3
983 ;// <o0.0..1> MW: Memory width
990 ;// <h> Static Memory Write Enable Delay Register (EMCStaticWaitWen3)
997 ;// <h> Static Memory Output Enable Delay register (EMCStaticWaitOen3)
1004 ;// <h> Static Memory Read Delay Register (EMCStaticWaitRd3)
1011 ;// <h> Static Memory Page Mode Read Delay Register (EMCStaticWaitPage3)
1018 ;// <h> Static Memory Write Delay Register (EMCStaticWaitWr3)
1025 ;// <h> Static Memory Turn Round Delay Register (EMCStaticWaitTurn3)
1034 ;// <h> Static Memory Extended Wait Register (EMCStaticExtendedWait)
1035 ;// <i> Time long static memory read and write transfers
1215 ; Setup Memory Accelerator Module ----------------------------------------------
1226 ; Setup External Memory Controller ---------------------------------------------
1253 ; Setup Dynamic Memory Interface
1395 ; Setup Static Memory Interface
1496 ; Memory Mapping (when Interrupt Vectors are in RAM) ---------------------------
1498 MEMMAP EQU 0xE01FC040 ; Memory Mapping Control