Lines Matching +full:high +full:- +full:frequency
3 Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
122 /* Bits 31..0 : Pointer to the resolvable address (6-bytes) */
1011 #define CCM_MODE_LENGTH_Default (0UL) /*!< Default length. Effective length of LENGTH field is 5-bi…
1012 #define CCM_MODE_LENGTH_Extended (1UL) /*!< Extended length. Effective length of LENGTH field is 8-…
1050 /* Bits 31..0 : Pointer to a scratch data area used for temporary storage during key-stream generat…
1191 #define CLOCK_LFCLKSRC_BYPASS_Disabled (0UL) /*!< Disable (use with Xtal or low-swing external sour…
1192 #define CLOCK_LFCLKSRC_BYPASS_Enabled (1UL) /*!< Enable (use with rail-to-rail external source) */
1214 #define CLOCK_TRACECONFIG_TRACEMUX_GPIO (0UL) /*!< GPIOs multiplexed onto all trace-pins */
1358 #define COMP_RESULT_RESULT_Below (0UL) /*!< Input voltage is below the threshold (VIN+ < VIN-) */
1359 #define COMP_RESULT_RESULT_Above (1UL) /*!< Input voltage is above the threshold (VIN+ > VIN-) */
1386 /* Description: Reference source select for single-ended mode */
1429 #define COMP_MODE_MAIN_SE (0UL) /*!< Single-ended mode */
1435 #define COMP_MODE_SP_Low (0UL) /*!< Low-power mode */
1437 #define COMP_MODE_SP_High (2UL) /*!< High-speed mode */
1455 #define COMP_ISOURCE_ISOURCE_Ien2mA5 (1UL) /*!< Current source enabled (+/- 2.5 uA) */
1456 #define COMP_ISOURCE_ISOURCE_Ien5mA (2UL) /*!< Current source enabled (+/- 5 uA) */
1457 #define COMP_ISOURCE_ISOURCE_Ien10mA (3UL) /*!< Current source enabled (+/- 10 uA) */
1921 #define FICR_INFO_PACKAGE_PACKAGE_QF (0x2000UL) /*!< QFxx - 48-pin QFN */
1922 #define FICR_INFO_PACKAGE_PACKAGE_CH (0x2001UL) /*!< CHxx - 7x8 WLCSP 56 balls */
1923 #define FICR_INFO_PACKAGE_PACKAGE_CI (0x2002UL) /*!< CIxx - 7x8 WLCSP 56 balls */
1924 #define FICR_INFO_PACKAGE_PACKAGE_CK (0x2005UL) /*!< CKxx - 7x8 WLCSP 56 balls with backside coatin…
1992 /* Description: y-intercept B0. */
1994 /* Bits 13..0 : B (y-intercept) */
1999 /* Description: y-intercept B1. */
2001 /* Bits 13..0 : B (y-intercept) */
2006 /* Description: y-intercept B2. */
2008 /* Bits 13..0 : B (y-intercept) */
2013 /* Description: y-intercept B3. */
2015 /* Bits 13..0 : B (y-intercept) */
2020 /* Description: y-intercept B4. */
2022 /* Bits 13..0 : B (y-intercept) */
2027 /* Description: y-intercept B5. */
2029 /* Bits 13..0 : B (y-intercept) */
2287 …TE_CONFIG_OUTINIT_High (1UL) /*!< Task mode: Initial value of pin before task triggering is high */
2310 /* Description: Inter-IC Sound */
2427 /* Description: Master clock generator frequency. */
2429 /* Bits 31..0 : Master clock generator frequency. */
2483 #define I2S_CONFIG_ALIGN_ALIGN_Left (0UL) /*!< Left-aligned. */
2484 #define I2S_CONFIG_ALIGN_ALIGN_Right (1UL) /*!< Right-aligned. */
2493 #define I2S_CONFIG_FORMAT_FORMAT_Aligned (1UL) /*!< Alternate (left- or right-aligned) format. */
2696 …_RESULT_RESULT_Below (0UL) /*!< Input voltage is below the reference threshold (VIN+ < VIN-). */
2697 …_RESULT_RESULT_Above (1UL) /*!< Input voltage is above the reference threshold (VIN+ > VIN-). */
3028 /* Description: Enable or disable non-maskable interrupt */
3030 /* Bit 27 : Enable or disable non-maskable interrupt for PREGION[1].RA event */
3036 /* Bit 26 : Enable or disable non-maskable interrupt for PREGION[1].WA event */
3042 /* Bit 25 : Enable or disable non-maskable interrupt for PREGION[0].RA event */
3048 /* Bit 24 : Enable or disable non-maskable interrupt for PREGION[0].WA event */
3054 /* Bit 7 : Enable or disable non-maskable interrupt for REGION[3].RA event */
3060 /* Bit 6 : Enable or disable non-maskable interrupt for REGION[3].WA event */
3066 /* Bit 5 : Enable or disable non-maskable interrupt for REGION[2].RA event */
3072 /* Bit 4 : Enable or disable non-maskable interrupt for REGION[2].WA event */
3078 /* Bit 3 : Enable or disable non-maskable interrupt for REGION[1].RA event */
3084 /* Bit 2 : Enable or disable non-maskable interrupt for REGION[1].WA event */
3090 /* Bit 1 : Enable or disable non-maskable interrupt for REGION[0].RA event */
3096 /* Bit 0 : Enable or disable non-maskable interrupt for REGION[0].WA event */
3103 /* Description: Enable non-maskable interrupt */
3105 /* Bit 27 : Write '1' to Enable non-maskable interrupt for PREGION[1].RA event */
3112 /* Bit 26 : Write '1' to Enable non-maskable interrupt for PREGION[1].WA event */
3119 /* Bit 25 : Write '1' to Enable non-maskable interrupt for PREGION[0].RA event */
3126 /* Bit 24 : Write '1' to Enable non-maskable interrupt for PREGION[0].WA event */
3133 /* Bit 7 : Write '1' to Enable non-maskable interrupt for REGION[3].RA event */
3140 /* Bit 6 : Write '1' to Enable non-maskable interrupt for REGION[3].WA event */
3147 /* Bit 5 : Write '1' to Enable non-maskable interrupt for REGION[2].RA event */
3154 /* Bit 4 : Write '1' to Enable non-maskable interrupt for REGION[2].WA event */
3161 /* Bit 3 : Write '1' to Enable non-maskable interrupt for REGION[1].RA event */
3168 /* Bit 2 : Write '1' to Enable non-maskable interrupt for REGION[1].WA event */
3175 /* Bit 1 : Write '1' to Enable non-maskable interrupt for REGION[0].RA event */
3182 /* Bit 0 : Write '1' to Enable non-maskable interrupt for REGION[0].WA event */
3190 /* Description: Disable non-maskable interrupt */
3192 /* Bit 27 : Write '1' to Disable non-maskable interrupt for PREGION[1].RA event */
3199 /* Bit 26 : Write '1' to Disable non-maskable interrupt for PREGION[1].WA event */
3206 /* Bit 25 : Write '1' to Disable non-maskable interrupt for PREGION[0].RA event */
3213 /* Bit 24 : Write '1' to Disable non-maskable interrupt for PREGION[0].WA event */
3220 /* Bit 7 : Write '1' to Disable non-maskable interrupt for REGION[3].RA event */
3227 /* Bit 6 : Write '1' to Disable non-maskable interrupt for REGION[3].WA event */
3234 /* Bit 5 : Write '1' to Disable non-maskable interrupt for REGION[2].RA event */
3241 /* Bit 4 : Write '1' to Disable non-maskable interrupt for REGION[2].WA event */
3248 /* Bit 3 : Write '1' to Disable non-maskable interrupt for REGION[1].RA event */
3255 /* Bit 2 : Write '1' to Disable non-maskable interrupt for REGION[1].WA event */
3262 /* Bit 1 : Write '1' to Disable non-maskable interrupt for REGION[0].RA event */
3269 /* Bit 0 : Write '1' to Disable non-maskable interrupt for REGION[0].WA event */
4140 /* Description: NFC-A compatible radio */
4473 /* Bit 2 : Field level is too high at max load resistance */
4683 /* Description: NFC-A SENS_RES auto-response settings */
4715 /* Description: NFC-A SEL_RES auto-response settings */
4749 #define NVMC_READY_READY_Busy (0UL) /*!< NVMC is busy (on-going write or erase operation) */
4770 /* Description: Deprecated register - Register for erasing a page in Code area. Equivalent to ERAS…
4777 /* Description: Register for erasing all non-volatile user memory */
4779 /* Bit 0 : Erase all non-volatile memory including UICR registers. Note that code erase has to be e…
4786 /* Description: Deprecated register - Register for erasing a page in Code area. Equivalent to ERAS…
4802 /* Description: I-Code cache configuration register. */
4817 /* Description: I-Code cache hit counter. */
4824 /* Description: I-Code cache miss counter. */
4841 #define GPIO_OUT_PIN31_High (1UL) /*!< Pin driver is high */
4847 #define GPIO_OUT_PIN30_High (1UL) /*!< Pin driver is high */
4853 #define GPIO_OUT_PIN29_High (1UL) /*!< Pin driver is high */
4859 #define GPIO_OUT_PIN28_High (1UL) /*!< Pin driver is high */
4865 #define GPIO_OUT_PIN27_High (1UL) /*!< Pin driver is high */
4871 #define GPIO_OUT_PIN26_High (1UL) /*!< Pin driver is high */
4877 #define GPIO_OUT_PIN25_High (1UL) /*!< Pin driver is high */
4883 #define GPIO_OUT_PIN24_High (1UL) /*!< Pin driver is high */
4889 #define GPIO_OUT_PIN23_High (1UL) /*!< Pin driver is high */
4895 #define GPIO_OUT_PIN22_High (1UL) /*!< Pin driver is high */
4901 #define GPIO_OUT_PIN21_High (1UL) /*!< Pin driver is high */
4907 #define GPIO_OUT_PIN20_High (1UL) /*!< Pin driver is high */
4913 #define GPIO_OUT_PIN19_High (1UL) /*!< Pin driver is high */
4919 #define GPIO_OUT_PIN18_High (1UL) /*!< Pin driver is high */
4925 #define GPIO_OUT_PIN17_High (1UL) /*!< Pin driver is high */
4931 #define GPIO_OUT_PIN16_High (1UL) /*!< Pin driver is high */
4937 #define GPIO_OUT_PIN15_High (1UL) /*!< Pin driver is high */
4943 #define GPIO_OUT_PIN14_High (1UL) /*!< Pin driver is high */
4949 #define GPIO_OUT_PIN13_High (1UL) /*!< Pin driver is high */
4955 #define GPIO_OUT_PIN12_High (1UL) /*!< Pin driver is high */
4961 #define GPIO_OUT_PIN11_High (1UL) /*!< Pin driver is high */
4967 #define GPIO_OUT_PIN10_High (1UL) /*!< Pin driver is high */
4973 #define GPIO_OUT_PIN9_High (1UL) /*!< Pin driver is high */
4979 #define GPIO_OUT_PIN8_High (1UL) /*!< Pin driver is high */
4985 #define GPIO_OUT_PIN7_High (1UL) /*!< Pin driver is high */
4991 #define GPIO_OUT_PIN6_High (1UL) /*!< Pin driver is high */
4997 #define GPIO_OUT_PIN5_High (1UL) /*!< Pin driver is high */
5003 #define GPIO_OUT_PIN4_High (1UL) /*!< Pin driver is high */
5009 #define GPIO_OUT_PIN3_High (1UL) /*!< Pin driver is high */
5015 #define GPIO_OUT_PIN2_High (1UL) /*!< Pin driver is high */
5021 #define GPIO_OUT_PIN1_High (1UL) /*!< Pin driver is high */
5027 #define GPIO_OUT_PIN0_High (1UL) /*!< Pin driver is high */
5036 #define GPIO_OUTSET_PIN31_High (1UL) /*!< Read: pin driver is high */
5037 #define GPIO_OUTSET_PIN31_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5043 #define GPIO_OUTSET_PIN30_High (1UL) /*!< Read: pin driver is high */
5044 #define GPIO_OUTSET_PIN30_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5050 #define GPIO_OUTSET_PIN29_High (1UL) /*!< Read: pin driver is high */
5051 #define GPIO_OUTSET_PIN29_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5057 #define GPIO_OUTSET_PIN28_High (1UL) /*!< Read: pin driver is high */
5058 #define GPIO_OUTSET_PIN28_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5064 #define GPIO_OUTSET_PIN27_High (1UL) /*!< Read: pin driver is high */
5065 #define GPIO_OUTSET_PIN27_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5071 #define GPIO_OUTSET_PIN26_High (1UL) /*!< Read: pin driver is high */
5072 #define GPIO_OUTSET_PIN26_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5078 #define GPIO_OUTSET_PIN25_High (1UL) /*!< Read: pin driver is high */
5079 #define GPIO_OUTSET_PIN25_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5085 #define GPIO_OUTSET_PIN24_High (1UL) /*!< Read: pin driver is high */
5086 #define GPIO_OUTSET_PIN24_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5092 #define GPIO_OUTSET_PIN23_High (1UL) /*!< Read: pin driver is high */
5093 #define GPIO_OUTSET_PIN23_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5099 #define GPIO_OUTSET_PIN22_High (1UL) /*!< Read: pin driver is high */
5100 #define GPIO_OUTSET_PIN22_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5106 #define GPIO_OUTSET_PIN21_High (1UL) /*!< Read: pin driver is high */
5107 #define GPIO_OUTSET_PIN21_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5113 #define GPIO_OUTSET_PIN20_High (1UL) /*!< Read: pin driver is high */
5114 #define GPIO_OUTSET_PIN20_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5120 #define GPIO_OUTSET_PIN19_High (1UL) /*!< Read: pin driver is high */
5121 #define GPIO_OUTSET_PIN19_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5127 #define GPIO_OUTSET_PIN18_High (1UL) /*!< Read: pin driver is high */
5128 #define GPIO_OUTSET_PIN18_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5134 #define GPIO_OUTSET_PIN17_High (1UL) /*!< Read: pin driver is high */
5135 #define GPIO_OUTSET_PIN17_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5141 #define GPIO_OUTSET_PIN16_High (1UL) /*!< Read: pin driver is high */
5142 #define GPIO_OUTSET_PIN16_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5148 #define GPIO_OUTSET_PIN15_High (1UL) /*!< Read: pin driver is high */
5149 #define GPIO_OUTSET_PIN15_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5155 #define GPIO_OUTSET_PIN14_High (1UL) /*!< Read: pin driver is high */
5156 #define GPIO_OUTSET_PIN14_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5162 #define GPIO_OUTSET_PIN13_High (1UL) /*!< Read: pin driver is high */
5163 #define GPIO_OUTSET_PIN13_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5169 #define GPIO_OUTSET_PIN12_High (1UL) /*!< Read: pin driver is high */
5170 #define GPIO_OUTSET_PIN12_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5176 #define GPIO_OUTSET_PIN11_High (1UL) /*!< Read: pin driver is high */
5177 #define GPIO_OUTSET_PIN11_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5183 #define GPIO_OUTSET_PIN10_High (1UL) /*!< Read: pin driver is high */
5184 #define GPIO_OUTSET_PIN10_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has …
5190 #define GPIO_OUTSET_PIN9_High (1UL) /*!< Read: pin driver is high */
5191 #define GPIO_OUTSET_PIN9_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has n…
5197 #define GPIO_OUTSET_PIN8_High (1UL) /*!< Read: pin driver is high */
5198 #define GPIO_OUTSET_PIN8_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has n…
5204 #define GPIO_OUTSET_PIN7_High (1UL) /*!< Read: pin driver is high */
5205 #define GPIO_OUTSET_PIN7_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has n…
5211 #define GPIO_OUTSET_PIN6_High (1UL) /*!< Read: pin driver is high */
5212 #define GPIO_OUTSET_PIN6_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has n…
5218 #define GPIO_OUTSET_PIN5_High (1UL) /*!< Read: pin driver is high */
5219 #define GPIO_OUTSET_PIN5_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has n…
5225 #define GPIO_OUTSET_PIN4_High (1UL) /*!< Read: pin driver is high */
5226 #define GPIO_OUTSET_PIN4_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has n…
5232 #define GPIO_OUTSET_PIN3_High (1UL) /*!< Read: pin driver is high */
5233 #define GPIO_OUTSET_PIN3_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has n…
5239 #define GPIO_OUTSET_PIN2_High (1UL) /*!< Read: pin driver is high */
5240 #define GPIO_OUTSET_PIN2_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has n…
5246 #define GPIO_OUTSET_PIN1_High (1UL) /*!< Read: pin driver is high */
5247 #define GPIO_OUTSET_PIN1_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has n…
5253 #define GPIO_OUTSET_PIN0_High (1UL) /*!< Read: pin driver is high */
5254 #define GPIO_OUTSET_PIN0_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has n…
5263 #define GPIO_OUTCLR_PIN31_High (1UL) /*!< Read: pin driver is high */
5270 #define GPIO_OUTCLR_PIN30_High (1UL) /*!< Read: pin driver is high */
5277 #define GPIO_OUTCLR_PIN29_High (1UL) /*!< Read: pin driver is high */
5284 #define GPIO_OUTCLR_PIN28_High (1UL) /*!< Read: pin driver is high */
5291 #define GPIO_OUTCLR_PIN27_High (1UL) /*!< Read: pin driver is high */
5298 #define GPIO_OUTCLR_PIN26_High (1UL) /*!< Read: pin driver is high */
5305 #define GPIO_OUTCLR_PIN25_High (1UL) /*!< Read: pin driver is high */
5312 #define GPIO_OUTCLR_PIN24_High (1UL) /*!< Read: pin driver is high */
5319 #define GPIO_OUTCLR_PIN23_High (1UL) /*!< Read: pin driver is high */
5326 #define GPIO_OUTCLR_PIN22_High (1UL) /*!< Read: pin driver is high */
5333 #define GPIO_OUTCLR_PIN21_High (1UL) /*!< Read: pin driver is high */
5340 #define GPIO_OUTCLR_PIN20_High (1UL) /*!< Read: pin driver is high */
5347 #define GPIO_OUTCLR_PIN19_High (1UL) /*!< Read: pin driver is high */
5354 #define GPIO_OUTCLR_PIN18_High (1UL) /*!< Read: pin driver is high */
5361 #define GPIO_OUTCLR_PIN17_High (1UL) /*!< Read: pin driver is high */
5368 #define GPIO_OUTCLR_PIN16_High (1UL) /*!< Read: pin driver is high */
5375 #define GPIO_OUTCLR_PIN15_High (1UL) /*!< Read: pin driver is high */
5382 #define GPIO_OUTCLR_PIN14_High (1UL) /*!< Read: pin driver is high */
5389 #define GPIO_OUTCLR_PIN13_High (1UL) /*!< Read: pin driver is high */
5396 #define GPIO_OUTCLR_PIN12_High (1UL) /*!< Read: pin driver is high */
5403 #define GPIO_OUTCLR_PIN11_High (1UL) /*!< Read: pin driver is high */
5410 #define GPIO_OUTCLR_PIN10_High (1UL) /*!< Read: pin driver is high */
5417 #define GPIO_OUTCLR_PIN9_High (1UL) /*!< Read: pin driver is high */
5424 #define GPIO_OUTCLR_PIN8_High (1UL) /*!< Read: pin driver is high */
5431 #define GPIO_OUTCLR_PIN7_High (1UL) /*!< Read: pin driver is high */
5438 #define GPIO_OUTCLR_PIN6_High (1UL) /*!< Read: pin driver is high */
5445 #define GPIO_OUTCLR_PIN5_High (1UL) /*!< Read: pin driver is high */
5452 #define GPIO_OUTCLR_PIN4_High (1UL) /*!< Read: pin driver is high */
5459 #define GPIO_OUTCLR_PIN3_High (1UL) /*!< Read: pin driver is high */
5466 #define GPIO_OUTCLR_PIN2_High (1UL) /*!< Read: pin driver is high */
5473 #define GPIO_OUTCLR_PIN1_High (1UL) /*!< Read: pin driver is high */
5480 #define GPIO_OUTCLR_PIN0_High (1UL) /*!< Read: pin driver is high */
5490 #define GPIO_IN_PIN31_High (1UL) /*!< Pin input is high */
5496 #define GPIO_IN_PIN30_High (1UL) /*!< Pin input is high */
5502 #define GPIO_IN_PIN29_High (1UL) /*!< Pin input is high */
5508 #define GPIO_IN_PIN28_High (1UL) /*!< Pin input is high */
5514 #define GPIO_IN_PIN27_High (1UL) /*!< Pin input is high */
5520 #define GPIO_IN_PIN26_High (1UL) /*!< Pin input is high */
5526 #define GPIO_IN_PIN25_High (1UL) /*!< Pin input is high */
5532 #define GPIO_IN_PIN24_High (1UL) /*!< Pin input is high */
5538 #define GPIO_IN_PIN23_High (1UL) /*!< Pin input is high */
5544 #define GPIO_IN_PIN22_High (1UL) /*!< Pin input is high */
5550 #define GPIO_IN_PIN21_High (1UL) /*!< Pin input is high */
5556 #define GPIO_IN_PIN20_High (1UL) /*!< Pin input is high */
5562 #define GPIO_IN_PIN19_High (1UL) /*!< Pin input is high */
5568 #define GPIO_IN_PIN18_High (1UL) /*!< Pin input is high */
5574 #define GPIO_IN_PIN17_High (1UL) /*!< Pin input is high */
5580 #define GPIO_IN_PIN16_High (1UL) /*!< Pin input is high */
5586 #define GPIO_IN_PIN15_High (1UL) /*!< Pin input is high */
5592 #define GPIO_IN_PIN14_High (1UL) /*!< Pin input is high */
5598 #define GPIO_IN_PIN13_High (1UL) /*!< Pin input is high */
5604 #define GPIO_IN_PIN12_High (1UL) /*!< Pin input is high */
5610 #define GPIO_IN_PIN11_High (1UL) /*!< Pin input is high */
5616 #define GPIO_IN_PIN10_High (1UL) /*!< Pin input is high */
5622 #define GPIO_IN_PIN9_High (1UL) /*!< Pin input is high */
5628 #define GPIO_IN_PIN8_High (1UL) /*!< Pin input is high */
5634 #define GPIO_IN_PIN7_High (1UL) /*!< Pin input is high */
5640 #define GPIO_IN_PIN6_High (1UL) /*!< Pin input is high */
5646 #define GPIO_IN_PIN5_High (1UL) /*!< Pin input is high */
5652 #define GPIO_IN_PIN4_High (1UL) /*!< Pin input is high */
5658 #define GPIO_IN_PIN3_High (1UL) /*!< Pin input is high */
5664 #define GPIO_IN_PIN2_High (1UL) /*!< Pin input is high */
5670 #define GPIO_IN_PIN1_High (1UL) /*!< Pin input is high */
5676 #define GPIO_IN_PIN0_High (1UL) /*!< Pin input is high */
6538 #define GPIO_PIN_CNF_SENSE_High (2UL) /*!< Sense for high level */
6545 #define GPIO_PIN_CNF_DRIVE_H0S1 (1UL) /*!< High drive '0', standard '1' */
6546 #define GPIO_PIN_CNF_DRIVE_S0H1 (2UL) /*!< Standard '0', high drive '1' */
6547 #define GPIO_PIN_CNF_DRIVE_H0H1 (3UL) /*!< High drive '0', high 'drive '1'' */
6548 #define GPIO_PIN_CNF_DRIVE_D0S1 (4UL) /*!< Disconnect '0' standard '1' (normally used for wired-or …
6549 #define GPIO_PIN_CNF_DRIVE_D0H1 (5UL) /*!< Disconnect '0', high drive '1' (normally used for wired-…
6550 #define GPIO_PIN_CNF_DRIVE_S0D1 (6UL) /*!< Standard '0'. disconnect '1' (normally used for wired-an…
6551 #define GPIO_PIN_CNF_DRIVE_H0D1 (7UL) /*!< High drive '0', disconnect '1' (normally used for wired-…
6657 /* Bits 31..0 : PDM_CLK frequency */
6682 …dule gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) …
6685 #define PDM_GAINL_GAINL_MinGain (0x00UL) /*!< -20dB gain adjustment (minimum) */
6695 #define PDM_GAINR_GAINR_MinGain (0x00UL) /*!< -20dB gain adjustment (minimum) */
6818 /* Bit 3 : Reset from CPU lock-up detected */
6836 /* Bit 0 : Reset from pin-reset detected */
6843 /* Description: Deprecated register - RAM status register */
6917 /* Description: Deprecated register - RAM on/off register (this register is retained) */
6944 /* Description: Deprecated register - RAM on/off register (this register is retained) */
7706 /* Description: Description cluster[0]: Channel 0 event end-point */
7713 /* Description: Description cluster[0]: Channel 0 task end-point */
7915 /* Description: Description cluster[0]: Channel 0 task end-point */
8122 #define PWM_MODE_UPDOWN_Up (0UL) /*!< Up counter - edge aligned PWM duty-cycle */
8123 #define PWM_MODE_UPDOWN_UpAndDown (1UL) /*!< Up and down counter - center aligned PWM duty cycle */
8135 /* Bits 2..0 : Pre-scaler of PWM_CLK */
8159 #define PWM_DECODER_LOAD_Common (0UL) /*!< 1st half word (16-bit) used in all PWM channels 0..3 */
8160 #define PWM_DECODER_LOAD_Grouped (1UL) /*!< 1st half word (16-bit) used in channel 0..1; 2nd word i…
8161 #define PWM_DECODER_LOAD_Individual (2UL) /*!< 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4t…
8162 #define PWM_DECODER_LOAD_WaveForm (3UL) /*!< 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th …
8356 #define QDEC_LEDPOL_LEDPOL_ActiveHigh (1UL) /*!< Led active on output pin high */
8735 /* Description: Frequency */
8743 /* Bits 6..0 : Radio channel frequency */
8744 #define RADIO_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */
8745 …QUENCY_FREQUENCY_Msk (0x7FUL << RADIO_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */
8756 #define RADIO_TXPOWER_TXPOWER_Neg40dBm (0xD8UL) /*!< -40 dBm */
8757 #define RADIO_TXPOWER_TXPOWER_Neg20dBm (0xECUL) /*!< -20 dBm */
8758 #define RADIO_TXPOWER_TXPOWER_Neg16dBm (0xF0UL) /*!< -16 dBm */
8759 #define RADIO_TXPOWER_TXPOWER_Neg12dBm (0xF4UL) /*!< -12 dBm */
8760 #define RADIO_TXPOWER_TXPOWER_Neg8dBm (0xF8UL) /*!< -8 dBm */
8761 #define RADIO_TXPOWER_TXPOWER_Neg4dBm (0xFCUL) /*!< -4 dBm */
8762 #define RADIO_TXPOWER_TXPOWER_Neg30dBm (0xFFUL) /*!< Deprecated enumerator - -40 dBm */
8767 /* Bits 3..0 : Radio data rate and modulation setting. The radio supports Frequency-shift Keying (F…
8772 #define RADIO_MODE_MODE_Nrf_250Kbit (2UL) /*!< Deprecated enumerator - 250 kbit/s Nordic proprieta…
8782 #define RADIO_PCNF0_PLEN_8bit (0UL) /*!< 8-bit preamble */
8783 #define RADIO_PCNF0_PLEN_16bit (1UL) /*!< 16-bit preamble */
8845 /* Description: Prefixes bytes for logical addresses 0-3 */
8864 /* Description: Prefixes bytes for logical addresses 4-7 */
9004 /* Bits 6..0 : Data whitening initial value. Bit 6 is hard-wired to '1', writing '0' to it has no e…
9120 #define RADIO_MODECNF0_DTX_Center (2UL) /*!< Transmit center frequency */
9122 /* Bit 0 : Radio ramp-up time */
9125 #define RADIO_MODECNF0_RU_Default (0UL) /*!< Default ramp-up time (tRXEN), compatible with firmware…
9126 #define RADIO_MODECNF0_RU_Fast (1UL) /*!< Fast ramp-up (tRXEN,FAST), see electrical specification f…
9417 /* Description: 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must be written when R…
9889 #define SAADC_STATUS_STATUS_Ready (0UL) /*!< ADC is ready. No on-going conversion. */
9982 #define SAADC_CH_CONFIG_RESN_Pulldown (1UL) /*!< Pull-down to GND */
9983 #define SAADC_CH_CONFIG_RESN_Pullup (2UL) /*!< Pull-up to VDD */
9990 #define SAADC_CH_CONFIG_RESP_Pulldown (1UL) /*!< Pull-down to GND */
9991 #define SAADC_CH_CONFIG_RESP_Pullup (2UL) /*!< Pull-up to VDD */
9995 /* Description: Description cluster[0]: High/low limits for event monitoring a channel */
9997 /* Bits 31..16 : High level limit */
9998 #define SAADC_CH_LIMIT_HIGH_Pos (16UL) /*!< Position of HIGH field. */
9999 #define SAADC_CH_LIMIT_HIGH_Msk (0xFFFFUL << SAADC_CH_LIMIT_HIGH_Pos) /*!< Bit mask of HIGH field. …
10017 … combined with SCAN. The RESOLUTION is applied before averaging, thus for high OVERSAMPLE a higher…
10138 /* Description: SPI frequency */
10141 #define SPI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */
10142 …CY_FREQUENCY_Msk (0xFFFFFFFFUL << SPI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */
10157 #define SPI_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */
10310 /* Description: SPI frequency. Accuracy depends on the HFCLK source selected. */
10313 #define SPIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */
10314 …Y_FREQUENCY_Msk (0xFFFFFFFFUL << SPIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */
10389 #define SPIM_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */
10405 /* Description: Over-read character. Character clocked out in case and over-read of the TXD buffer.…
10407 /* Bits 7..0 : Over-read character. Character clocked out in case and over-read of the TXD buffer. …
10493 /* Bit 0 : TX buffer over-read detected, and prevented */
10609 #define SPIS_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */
10632 /* Description: Over-read character */
10634 /* Bits 7..0 : Over-read character. Character clocked out after an over-read of the transmit buffer…
10712 /* Description: y-intercept of 1st piece wise linear function */
10714 /* Bits 13..0 : y-intercept of 1st piece wise linear function */
10719 /* Description: y-intercept of 2nd piece wise linear function */
10721 /* Bits 13..0 : y-intercept of 2nd piece wise linear function */
10726 /* Description: y-intercept of 3rd piece wise linear function */
10728 /* Bits 13..0 : y-intercept of 3rd piece wise linear function */
10733 /* Description: y-intercept of 4th piece wise linear function */
10735 /* Bits 13..0 : y-intercept of 4th piece wise linear function */
10740 /* Description: y-intercept of 5th piece wise linear function */
10742 /* Bits 13..0 : y-intercept of 5th piece wise linear function */
10747 /* Description: y-intercept of 6th piece wise linear function */
10749 /* Bits 13..0 : y-intercept of 6th piece wise linear function */
10964 #define TIMER_MODE_MODE_Counter (1UL) /*!< Deprecated enumerator - Select Counter mode */
10994 /* Description: I2C compatible Two-Wire Interface 0 */
11165 /* Description: TWI frequency */
11167 /* Bits 31..0 : TWI master clock frequency */
11168 #define TWI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */
11169 …CY_FREQUENCY_Msk (0xFFFFFFFFUL << TWI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */
11183 /* Description: I2C compatible Two-Wire Master Interface with EasyDMA 0 */
11424 /* Description: TWI frequency */
11426 /* Bits 31..0 : TWI master clock frequency */
11427 #define TWIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */
11428 …Y_FREQUENCY_Msk (0xFFFFFFFFUL << TWIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */
11502 /* Description: I2C compatible Two-Wire Slave Interface with EasyDMA 0 */
11651 /* Bit 3 : TX buffer over-read detected, and prevented */
11776 /* Description: Over-read character. Character sent out in case of an over-read of the transmit buf…
11778 /* Bits 7..0 : Over-read character. Character sent out in case of an over-read of the transmit buff…
12653 /*lint --flb "Leave library region" */