Lines Matching full:description

39 /* Description: Accelerated Address Resolver */
42 /* Description: Enable interrupt */
66 /* Description: Disable interrupt */
90 /* Description: Resolution status */
97 /* Description: Enable AAR */
106 /* Description: Number of IRKs */
113 /* Description: Pointer to IRK data structure */
120 /* Description: Pointer to the resolvable address */
127 /* Description: Pointer to data area used for temporary storage */
135 /* Description: Block Protect */
138 /* Description: Block protect configuration register 0 */
333 /* Description: Block protect configuration register 1 */
528 /* Description: Disable protection mechanism in debug interface mode */
537 /* Description: Block protect configuration register 2 */
732 /* Description: Block protect configuration register 3 */
928 /* Description: AES CCM Mode Encryption */
931 /* Description: Shortcut register */
940 /* Description: Enable interrupt */
964 /* Description: Disable interrupt */
988 /* Description: MIC check result */
997 /* Description: Enable */
1006 /* Description: Operation mode */
1027 /* Description: Pointer to data structure holding AES key and NONCE vector */
1034 /* Description: Input pointer */
1041 /* Description: Output pointer */
1048 /* Description: Pointer to data area used for temporary storage */
1056 /* Description: Clock control */
1059 /* Description: Enable interrupt */
1090 /* Description: Disable interrupt */
1121 /* Description: Status indicating that HFCLKSTART task has been triggered */
1130 /* Description: HFCLK status */
1145 /* Description: Status indicating that LFCLKSTART task has been triggered */
1154 /* Description: LFCLK status */
1170 /* Description: Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */
1180 /* Description: Clock source for the LFCLK */
1202 /* Description: Calibration timer interval */
1209 /* Description: Clocking options for the Trace Port debug interface */
1228 /* Description: Comparator */
1231 /* Description: Shortcut register */
1264 /* Description: Enable or disable interrupt */
1291 /* Description: Enable interrupt */
1322 /* Description: Disable interrupt */
1353 /* Description: Compare result */
1362 /* Description: COMP enable */
1371 /* Description: Pin select */
1386 /* Description: Reference source select for single-ended mode */
1398 /* Description: External reference select */
1413 /* Description: Threshold configuration for hysteresis unit */
1424 /* Description: Mode configuration */
1440 /* Description: Comparator hysteresis enable */
1449 /* Description: Current source select on analog input */
1461 /* Description: AES ECB Mode Encryption */
1464 /* Description: Enable interrupt */
1481 /* Description: Disable interrupt */
1498 /* Description: ECB block encrypt memory pointers */
1506 /* Description: Event Generator Unit 0 */
1509 /* Description: Enable or disable interrupt */
1608 /* Description: Enable interrupt */
1723 /* Description: Disable interrupt */
1839 /* Description: Factory Information Configuration Registers */
1842 /* Description: Code memory page size */
1849 /* Description: Code memory size */
1856 /* Description: Description collection[0]:  Device identifier */
1863 /* Description: Description collection[0]:  Encryption Root, word 0 */
1870 /* Description: Description collection[0]:  Identity Root, word 0 */
1877 /* Description: Device address type */
1886 /* Description: Description collection[0]:  Device address 0 */
1893 /* Description: Part code */
1902 /* Description: Part Variant, Hardware version and Production configuration */
1916 /* Description: Package option */
1928 /* Description: RAM variant */
1939 /* Description: Flash variant */
1950 /* Description: Slope definition A0. */
1957 /* Description: Slope definition A1. */
1964 /* Description: Slope definition A2. */
1971 /* Description: Slope definition A3. */
1978 /* Description: Slope definition A4. */
1985 /* Description: Slope definition A5. */
1992 /* Description: y-intercept B0. */
1999 /* Description: y-intercept B1. */
2006 /* Description: y-intercept B2. */
2013 /* Description: y-intercept B3. */
2020 /* Description: y-intercept B4. */
2027 /* Description: y-intercept B5. */
2034 /* Description: Segment end T0. */
2041 /* Description: Segment end T1. */
2048 /* Description: Segment end T2. */
2055 /* Description: Segment end T3. */
2062 /* Description: Segment end T4. */
2069 /* Description: Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_L…
2088 /* Description: Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_L…
2107 /* Description: Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_L…
2126 /* Description: Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_L…
2146 /* Description: GPIO Tasks and Events */
2149 /* Description: Enable interrupt */
2215 /* Description: Disable interrupt */
2281 /* Description: Description collection[0]:  Configuration for OUT[n], SET[n] and CLR[n] tasks and I…
2310 /* Description: Inter-IC Sound */
2313 /* Description: Enable or disable interrupt */
2334 /* Description: Enable interrupt */
2358 /* Description: Disable interrupt */
2382 /* Description: Enable I2S module. */
2391 /* Description: I2S mode. */
2400 /* Description: Reception (RX) enable. */
2409 /* Description: Transmission (TX) enable. */
2418 /* Description: Master clock generator enable. */
2427 /* Description: Master clock generator frequency. */
2452 /* Description: MCK / LRCK ratio. */
2468 /* Description: Sample width. */
2478 /* Description: Alignment of sample within a frame. */
2487 /* Description: Frame format. */
2496 /* Description: Enable channels. */
2506 /* Description: Receive buffer RAM start address. */
2513 /* Description: Transmit buffer RAM start address. */
2520 /* Description: Size of RXD and TXD buffers. */
2527 /* Description: Pin select for MCK signal. */
2540 /* Description: Pin select for SCK signal. */
2553 /* Description: Pin select for LRCK signal. */
2566 /* Description: Pin select for SDIN signal. */
2579 /* Description: Pin select for SDOUT signal. */
2593 /* Description: Low Power Comparator */
2596 /* Description: Shortcut register */
2629 /* Description: Enable interrupt */
2660 /* Description: Disable interrupt */
2691 /* Description: Compare result */
2700 /* Description: Enable LPCOMP */
2709 /* Description: Input pin select */
2724 /* Description: Reference select */
2747 /* Description: External reference select */
2756 /* Description: Analog detect configuration */
2766 /* Description: Comparator hysteresis enable */
2776 /* Description: Memory Watch Unit */
2779 /* Description: Enable or disable interrupt */
2854 /* Description: Enable interrupt */
2941 /* Description: Disable interrupt */
3028 /* Description: Enable or disable non-maskable interrupt */
3103 /* Description: Enable non-maskable interrupt */
3190 /* Description: Disable non-maskable interrupt */
3277 /* Description: Description cluster[0]:  Source of event/interrupt in region 0, write access detect…
3472 /* Description: Description cluster[0]:  Source of event/interrupt in region 0, read access detecte…
3667 /* Description: Enable/disable regions watch */
3742 /* Description: Enable regions watch */
3829 /* Description: Disable regions watch */
3916 /* Description: Description cluster[0]:  Start address for region 0 */
3923 /* Description: Description cluster[0]:  End address of region 0 */
3930 /* Description: Description cluster[0]:  Reserved for future use */
3937 /* Description: Description cluster[0]:  Reserved for future use */
3944 /* Description: Description cluster[0]:  Subregions of region 0 */
4140 /* Description: NFC-A compatible radio */
4143 /* Description: Shortcut register */
4158 /* Description: Enable or disable interrupt */
4251 /* Description: Enable interrupt */
4359 /* Description: Disable interrupt */
4467 /* Description: NFC Error Status register */
4482 /* Description: Result of last incoming frames */
4503 /* Description: Current value driven to the NFC Load Control */
4510 /* Description: Indicates the presence or not of a valid field */
4525 /* Description: Minimum frame delay */
4532 /* Description: Maximum frame delay */
4539 /* Description: Configuration register for the Frame Delay Timer */
4550 /* Description: Packet pointer for TXD and RXD data storage in Data RAM */
4557 /* Description: Size of allocated for TXD and RXD data storage buffer in Data RAM */
4564 /* Description: Configuration of outgoing frames */
4591 /* Description: Size of outgoing frame */
4602 /* Description: Configuration of incoming frames */
4623 /* Description: Size of last incoming frame */
4634 /* Description: Last NFCID1 part (4, 7 or 10 bytes ID) */
4653 /* Description: Second last NFCID1 part (7 or 10 bytes ID) */
4668 /* Description: Third last NFCID1 part (10 bytes ID) */
4683 /* Description: NFC-A SENS_RES auto-response settings */
4715 /* Description: NFC-A SEL_RES auto-response settings */
4741 /* Description: Non Volatile Memory Controller */
4744 /* Description: Ready flag */
4753 /* Description: Configuration register */
4763 /* Description: Register for erasing a page in Code area */
4770 /* Description: Deprecated register -  Register for erasing a page in Code area. Equivalent to ERAS…
4777 /* Description: Register for erasing all non-volatile user memory */
4786 /* Description: Deprecated register -  Register for erasing a page in Code area. Equivalent to ERAS…
4793 /* Description: Register for erasing User Information Configuration Registers */
4802 /* Description: I-Code cache configuration register. */
4817 /* Description: I-Code cache hit counter. */
4824 /* Description: I-Code cache miss counter. */
4832 /* Description: GPIO Port 1 */
4835 /* Description: Write GPIO port */
5030 /* Description: Set individual bits in GPIO port */
5257 /* Description: Clear individual bits in GPIO port */
5484 /* Description: Read GPIO port */
5679 /* Description: Direction of GPIO pins */
5874 /* Description: DIR set register */
6101 /* Description: DIR clear register */
6328 /* Description: Latch register indicating what GPIO pins that have met the criteria set in the PIN_…
6523 /* Description: Select between default DETECT signal behaviour and LDETECT mode */
6532 /* Description: Description collection[0]:  Configuration of GPIO pins */
6574 /* Description: Pulse Density Modulation (Digital Microphone) Interface */
6577 /* Description: Enable or disable interrupt */
6598 /* Description: Enable interrupt */
6622 /* Description: Disable interrupt */
6646 /* Description: PDM module enable register */
6655 /* Description: PDM clock generator control */
6665 /* Description: Defines the routing of the connected PDM microphones' signals */
6680 /* Description: Left output gain adjustment */
6690 /* Description: Right output gain adjustment */
6700 /* Description: Pin number configuration for PDM CLK signal */
6713 /* Description: Pin number configuration for PDM DIN signal */
6726 /* Description: RAM address pointer to write samples to with EasyDMA */
6733 /* Description: Number of samples to allocate memory for in EasyDMA mode */
6741 /* Description: Power control */
6744 /* Description: Enable interrupt */
6768 /* Description: Disable interrupt */
6792 /* Description: Reset reason */
6843 /* Description: Deprecated register -  RAM status register */
6870 /* Description: System OFF register */
6878 /* Description: Power failure comparator configuration */
6903 /* Description: General purpose retention register */
6910 /* Description: General purpose retention register */
6917 /* Description: Deprecated register -  RAM on/off register (this register is retained) */
6944 /* Description: Deprecated register -  RAM on/off register (this register is retained) */
6971 /* Description: DC/DC enable register */
6980 /* Description: Description cluster[0]:  RAM0 power control register */
7007 /* Description: Description cluster[0]:  RAM0 power control set register */
7030 /* Description: Description cluster[0]:  RAM0 power control clear register */
7054 /* Description: Programmable Peripheral Interconnect */
7057 /* Description: Channel enable register */
7252 /* Description: Channel enable set register */
7479 /* Description: Channel enable clear register */
7706 /* Description: Description cluster[0]:  Channel 0 event end-point */
7713 /* Description: Description cluster[0]:  Channel 0 task end-point */
7720 /* Description: Description collection[0]:  Channel group 0 */
7915 /* Description: Description cluster[0]:  Channel 0 task end-point */
7923 /* Description: Pulse Width Modulation Unit 0 */
7926 /* Description: Shortcut register */
7959 /* Description: Enable or disable interrupt */
8004 /* Description: Enable interrupt */
8056 /* Description: Disable interrupt */
8108 /* Description: PWM module enable register */
8117 /* Description: Selects operating mode of the wave counter */
8126 /* Description: Value up to which the pulse generator counter counts */
8133 /* Description: Configuration for PWM_CLK */
8148 /* Description: Configuration of the decoder */
8165 /* Description: Amount of playback of a loop */
8173 /* Description: Description cluster[0]:  Beginning address in Data RAM of this sequence */
8180 /* Description: Description cluster[0]:  Amount of values (duty cycles) in this sequence */
8188 /* Description: Description cluster[0]:  Amount of additional PWM periods between samples loaded in…
8196 /* Description: Description cluster[0]:  Time added after the sequence */
8203 /* Description: Description collection[0]:  Output pin select for PWM channel 0 */
8217 /* Description: Quadrature Decoder */
8220 /* Description: Shortcut register */
8265 /* Description: Enable interrupt */
8303 /* Description: Disable interrupt */
8341 /* Description: Enable the quadrature decoder */
8350 /* Description: LED output pin polarity */
8359 /* Description: Sample period */
8377 /* Description: Motion sample value */
8384 /* Description: Number of samples to be taken before REPORTRDY and DBLRDY events can be generated */
8400 /* Description: Register accumulating the valid transitions */
8407 /* Description: Snapshot of the ACC register, updated by the READCLRACC or RDCLRACC task */
8414 /* Description: Pin select for LED signal */
8427 /* Description: Pin select for A signal */
8440 /* Description: Pin select for B signal */
8453 /* Description: Enable input debounce filters */
8462 /* Description: Time period the LED is switched ON prior to sampling */
8469 /* Description: Register accumulating the number of detected double transitions */
8476 /* Description: Snapshot of the ACCDBL, updated by the READCLRACC or RDCLRDBL task */
8484 /* Description: 2.4 GHz Radio */
8487 /* Description: Shortcut register */
8538 /* Description: Enable interrupt */
8618 /* Description: Disable interrupt */
8698 /* Description: CRC status */
8707 /* Description: Received address */
8714 /* Description: CRC field of previously received packet */
8721 /* Description: Device address match index */
8728 /* Description: Packet pointer */
8735 /* Description: Frequency */
8748 /* Description: Output power */
8765 /* Description: Data rate and modulation */
8777 /* Description: Packet configuration register 0 */
8804 /* Description: Packet configuration register 1 */
8831 /* Description: Base address 0 */
8838 /* Description: Base address 1 */
8845 /* Description: Prefixes bytes for logical addresses 0-3 */
8864 /* Description: Prefixes bytes for logical addresses 4-7 */
8883 /* Description: Transmit address select */
8890 /* Description: Receive address select */
8941 /* Description: CRC configuration */
8958 /* Description: CRC polynomial */
8965 /* Description: CRC initial value */
8972 /* Description: Inter Frame Spacing in us */
8979 /* Description: RSSI sample */
8986 /* Description: Current radio state */
9002 /* Description: Data whitening initial value */
9009 /* Description: Bit counter compare */
9016 /* Description: Description collection[0]:  Device address base segment 0 */
9023 /* Description: Description collection[0]:  Device address prefix 0 */
9030 /* Description: Device address match configuration */
9113 /* Description: Radio mode configuration register 0 */
9129 /* Description: Peripheral power control */
9139 /* Description: Random Number Generator */
9142 /* Description: Shortcut register */
9151 /* Description: Enable interrupt */
9161 /* Description: Disable interrupt */
9171 /* Description: Configuration register */
9180 /* Description: Output random number */
9188 /* Description: Real time counter 0 */
9191 /* Description: Enable interrupt */
9236 /* Description: Disable interrupt */
9281 /* Description: Enable or disable event routing */
9320 /* Description: Enable event routing */
9365 /* Description: Disable event routing */
9410 /* Description: Current COUNTER value */
9417 /* Description: 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must be written when R…
9424 /* Description: Description collection[0]:  Compare register 0 */
9432 /* Description: Analog to Digital Converter */
9435 /* Description: Enable or disable interrupt */
9570 /* Description: Enable interrupt */
9727 /* Description: Disable interrupt */
9884 /* Description: Status */
9893 /* Description: Enable or disable ADC */
9902 /* Description: Description cluster[0]:  Input positive pin selection for CH[0] */
9919 /* Description: Description cluster[0]:  Input negative pin selection for CH[0] */
9936 /* Description: Description cluster[0]:  Input configuration for CH[0] */
9995 /* Description: Description cluster[0]:  High/low limits for event monitoring a channel */
10006 /* Description: Resolution configuration */
10017 /* Description: Oversampling configuration. OVERSAMPLE should not be combined with SCAN. The RESOLU…
10033 /* Description: Controls normal or continuous sample rate */
10046 /* Description: Data pointer */
10053 /* Description: Maximum number of buffer words to transfer */
10060 /* Description: Number of buffer words transferred since last START */
10068 /* Description: Serial Peripheral Interface 0 */
10071 /* Description: Enable interrupt */
10081 /* Description: Disable interrupt */
10091 /* Description: Enable SPI */
10100 /* Description: Pin select for SCK */
10108 /* Description: Pin select for MOSI */
10116 /* Description: Pin select for MISO */
10124 /* Description: RXD register */
10131 /* Description: TXD register */
10138 /* Description: SPI frequency */
10152 /* Description: Configuration register */
10174 /* Description: Serial Peripheral Interface Master with EasyDMA 0 */
10177 /* Description: Shortcut register */
10186 /* Description: Enable interrupt */
10224 /* Description: Disable interrupt */
10262 /* Description: Enable SPIM */
10271 /* Description: Pin select for SCK */
10284 /* Description: Pin select for MOSI signal */
10297 /* Description: Pin select for MISO signal */
10310 /* Description: SPI frequency. Accuracy depends on the HFCLK source selected. */
10324 /* Description: Data pointer */
10331 /* Description: Maximum number of bytes in receive buffer */
10338 /* Description: Number of bytes transferred in the last transaction */
10345 /* Description: EasyDMA list type */
10354 /* Description: Data pointer */
10361 /* Description: Maximum number of bytes in transmit buffer */
10368 /* Description: Number of bytes transferred in the last transaction */
10375 /* Description: EasyDMA list type */
10384 /* Description: Configuration register */
10405 /* Description: Over-read character. Character clocked out in case and over-read of the TXD buffer.…
10413 /* Description: SPI Slave 0 */
10416 /* Description: Shortcut register */
10425 /* Description: Enable interrupt */
10449 /* Description: Disable interrupt */
10473 /* Description: Semaphore status register */
10484 /* Description: Status from last transaction */
10501 /* Description: Enable SPI slave */
10510 /* Description: Pin select for SCK */
10523 /* Description: Pin select for MISO signal */
10536 /* Description: Pin select for MOSI signal */
10549 /* Description: Pin select for CSN signal */
10562 /* Description: RXD data pointer */
10569 /* Description: Maximum number of bytes in receive buffer */
10576 /* Description: Number of bytes received in last granted transaction */
10583 /* Description: TXD data pointer */
10590 /* Description: Maximum number of bytes in transmit buffer */
10597 /* Description: Number of bytes transmitted in last granted transaction */
10604 /* Description: Configuration register */
10625 /* Description: Default character. Character clocked out in case of an ignored transaction. */
10632 /* Description: Over-read character */
10640 /* Description: Temperature Sensor */
10643 /* Description: Enable interrupt */
10653 /* Description: Disable interrupt */
10663 /* Description: Temperature in degC (0.25deg steps) */
10670 /* Description: Slope of 1st piece wise linear function */
10677 /* Description: Slope of 2nd piece wise linear function */
10684 /* Description: Slope of 3rd piece wise linear function */
10691 /* Description: Slope of 4th piece wise linear function */
10698 /* Description: Slope of 5th piece wise linear function */
10705 /* Description: Slope of 6th piece wise linear function */
10712 /* Description: y-intercept of 1st piece wise linear function */
10719 /* Description: y-intercept of 2nd piece wise linear function */
10726 /* Description: y-intercept of 3rd piece wise linear function */
10733 /* Description: y-intercept of 4th piece wise linear function */
10740 /* Description: y-intercept of 5th piece wise linear function */
10747 /* Description: y-intercept of 6th piece wise linear function */
10754 /* Description: End point of 1st piece wise linear function */
10761 /* Description: End point of 2nd piece wise linear function */
10768 /* Description: End point of 3rd piece wise linear function */
10775 /* Description: End point of 4th piece wise linear function */
10782 /* Description: End point of 5th piece wise linear function */
10790 /* Description: Timer/Counter 0 */
10793 /* Description: Shortcut register */
10868 /* Description: Enable interrupt */
10913 /* Description: Disable interrupt */
10958 /* Description: Timer mode selection */
10968 /* Description: Configure the number of bits used by the TIMER */
10979 /* Description: Timer prescaler register */
10986 /* Description: Description collection[0]:  Capture/Compare register 0 */
10994 /* Description: I2C compatible Two-Wire Interface 0 */
10997 /* Description: Shortcut register */
11012 /* Description: Enable interrupt */
11057 /* Description: Disable interrupt */
11102 /* Description: Error source */
11126 /* Description: Enable TWI */
11135 /* Description: Pin select for SCL */
11143 /* Description: Pin select for SDA */
11151 /* Description: RXD register */
11158 /* Description: TXD register */
11165 /* Description: TWI frequency */
11175 /* Description: Address used in the TWI transfer */
11183 /* Description: I2C compatible Two-Wire Master Interface with EasyDMA 0 */
11186 /* Description: Shortcut register */
11219 /* Description: Enable or disable interrupt */
11264 /* Description: Enable interrupt */
11316 /* Description: Disable interrupt */
11368 /* Description: Error source */
11389 /* Description: Enable TWIM */
11398 /* Description: Pin select for SCL signal */
11411 /* Description: Pin select for SDA signal */
11424 /* Description: TWI frequency */
11434 /* Description: Data pointer */
11441 /* Description: Maximum number of bytes in receive buffer */
11448 /* Description: Number of bytes transferred in the last transaction */
11455 /* Description: EasyDMA list type */
11464 /* Description: Data pointer */
11471 /* Description: Maximum number of bytes in transmit buffer */
11478 /* Description: Number of bytes transferred in the last transaction */
11485 /* Description: EasyDMA list type */
11494 /* Description: Address used in the TWI transfer */
11502 /* Description: I2C compatible Two-Wire Slave Interface with EasyDMA 0 */
11505 /* Description: Shortcut register */
11520 /* Description: Enable or disable interrupt */
11559 /* Description: Enable interrupt */
11604 /* Description: Disable interrupt */
11649 /* Description: Error source */
11670 /* Description: Status register indicating which address had a match */
11677 /* Description: Enable TWIS */
11686 /* Description: Pin select for SCL signal */
11699 /* Description: Pin select for SDA signal */
11712 /* Description: RXD Data pointer */
11719 /* Description: Maximum number of bytes in RXD buffer */
11726 /* Description: Number of bytes transferred in the last RXD transaction */
11733 /* Description: TXD Data pointer */
11740 /* Description: Maximum number of bytes in TXD buffer */
11747 /* Description: Number of bytes transferred in the last TXD transaction */
11754 /* Description: Description collection[0]:  TWI slave address 0 */
11761 /* Description: Configuration register for the address match mechanism */
11776 /* Description: Over-read character. Character sent out in case of an over-read of the transmit buf…
11784 /* Description: Universal Asynchronous Receiver/Transmitter */
11787 /* Description: Shortcut register */
11802 /* Description: Enable interrupt */
11847 /* Description: Disable interrupt */
11892 /* Description: Error source */
11919 /* Description: Enable UART */
11928 /* Description: Pin select for RTS */
11936 /* Description: Pin select for TXD */
11944 /* Description: Pin select for CTS */
11952 /* Description: Pin select for RXD */
11960 /* Description: RXD register */
11967 /* Description: TXD register */
11974 /* Description: Baud rate */
11999 /* Description: Configuration of parity and hardware flow control */
12015 /* Description: UART with EasyDMA */
12018 /* Description: Shortcut register */
12033 /* Description: Enable or disable interrupt */
12102 /* Description: Enable interrupt */
12182 /* Description: Disable interrupt */
12262 /* Description: Error source */
12289 /* Description: Enable UART */
12298 /* Description: Pin select for RTS signal */
12311 /* Description: Pin select for TXD signal */
12324 /* Description: Pin select for CTS signal */
12337 /* Description: Pin select for RXD signal */
12350 /* Description: Baud rate. Accuracy depends on the HFCLK source selected. */
12375 /* Description: Data pointer */
12382 /* Description: Maximum number of bytes in receive buffer */
12389 /* Description: Number of bytes transferred in the last transaction */
12396 /* Description: Data pointer */
12403 /* Description: Maximum number of bytes in transmit buffer */
12410 /* Description: Number of bytes transferred in the last transaction */
12417 /* Description: Configuration of parity and hardware flow control */
12433 /* Description: User Information Configuration Registers */
12436 /* Description: Description collection[0]:  Reserved for Nordic firmware design */
12443 /* Description: Description collection[0]:  Reserved for Nordic hardware design */
12450 /* Description: Description collection[0]:  Reserved for customer */
12457 /* Description: Description collection[0]:  Mapping of the nRESET function (see POWER chapter for d…
12470 /* Description: Access Port protection */
12479 /* Description: Setting of pins dedicated to NFC functionality: NFC antenna or GPIO */
12489 /* Description: Watchdog Timer */
12492 /* Description: Enable interrupt */
12502 /* Description: Disable interrupt */
12512 /* Description: Run status */
12521 /* Description: Request status */
12572 /* Description: Counter reload value */
12579 /* Description: Enable register for reload request registers */
12630 /* Description: Configuration register */
12645 /* Description: Description collection[0]:  Reload request 0 */