Lines Matching full:description

39 /* Description: Accelerated Address Resolver. */
42 /* Description: Interrupt enable set register. */
66 /* Description: Interrupt enable clear register. */
90 /* Description: Resolution status. */
97 /* Description: Enable AAR. */
106 /* Description: Number of Identity root Keys in the IRK data structure. */
113 /* Description: Peripheral power control. */
123 /* Description: Analog to digital converter. */
126 /* Description: Interrupt enable set register. */
136 /* Description: Interrupt enable clear register. */
146 /* Description: ADC busy register. */
155 /* Description: ADC enable. */
164 /* Description: ADC configuration register. */
211 /* Description: Result of ADC conversion. */
218 /* Description: Peripheral power control. */
228 /* Description: AES CCM Mode Encryption. */
231 /* Description: Shortcuts for the CCM. */
240 /* Description: Interrupt enable set register. */
264 /* Description: Interrupt enable clear register. */
288 /* Description: CCM RX MIC check result. */
297 /* Description: CCM enable. */
306 /* Description: Operation mode. */
315 /* Description: Peripheral power control. */
325 /* Description: Clock control. */
328 /* Description: Interrupt enable set register. */
359 /* Description: Interrupt enable clear register. */
390 /* Description: Task HFCLKSTART trigger status. */
399 /* Description: High frequency clock status. */
414 /* Description: Task LFCLKSTART triggered status. */
423 /* Description: Low frequency clock status. */
439 /* Description: Clock source for the LFCLK clock, set when task LKCLKSTART is triggered. */
449 /* Description: Clock source for the LFCLK clock. */
459 /* Description: Calibration timer interval. */
466 /* Description: Crystal frequency. */
476 /* Description: AES ECB Mode Encryption. */
479 /* Description: Interrupt enable set register. */
496 /* Description: Interrupt enable clear register. */
513 /* Description: Peripheral power control. */
523 /* Description: Factory Information Configuration. */
526 /* Description: Pre-programmed factory code present. */
535 /* Description: Configuration identifier. */
546 /* Description: Device address type. */
555 /* Description: Radio calibration override enable. */
571 /* Description: General purpose input and output. */
574 /* Description: Write GPIO port. */
769 /* Description: Set individual bits in GPIO port. */
996 /* Description: Clear individual bits in GPIO port. */
1223 /* Description: Read GPIO port. */
1418 /* Description: Direction of GPIO pins. */
1613 /* Description: DIR set register. */
1840 /* Description: DIR clear register. */
2067 /* Description: Configuration of GPIO pins. */
2109 /* Description: GPIO tasks and events. */
2112 /* Description: Interrupt enable set register. */
2150 /* Description: Interrupt enable clear register. */
2188 /* Description: Channel configuration registers. */
2216 /* Description: Peripheral power control. */
2226 /* Description: Low power comparator. */
2229 /* Description: Shortcuts for the LPCOMP. */
2262 /* Description: Interrupt enable set register. */
2293 /* Description: Interrupt enable clear register. */
2324 /* Description: Result of last compare. */
2333 /* Description: Enable the LPCOMP. */
2342 /* Description: Input pin select. */
2357 /* Description: Reference select. */
2372 /* Description: External reference select. */
2381 /* Description: Analog detect configuration. */
2391 /* Description: Peripheral power control. */
2401 /* Description: Memory Protection Unit. */
2404 /* Description: Configuration of peripherals in mpu regions. */
2533 /* Description: Erase and write protection bit enable set register. */
2760 /* Description: Erase and write protection bit enable set register. */
2987 /* Description: Disable erase and write protection mechanism in debug mode. */
2996 /* Description: Erase and write protection block size. */
3005 /* Description: Non Volatile Memory Controller. */
3008 /* Description: Ready flag. */
3017 /* Description: Configuration register. */
3027 /* Description: Register for erasing all non-volatile user memory. */
3036 /* Description: Register for start erasing User Information Congfiguration Registers. */
3046 /* Description: Power Control. */
3049 /* Description: Interrupt enable set register. */
3059 /* Description: Interrupt enable clear register. */
3069 /* Description: Reset reason. */
3114 /* Description: Ram status register. */
3141 /* Description: System off register. */
3149 /* Description: Power failure configuration. */
3166 /* Description: General purpose retention register. This register is a retained register. */
3173 /* Description: Ram on/off. */
3200 /* Description: Pin reset functionality configuration register. This register is a retained registe…
3209 /* Description: Ram on/off. */
3236 /* Description: DCDC converter enable configuration register. */
3245 /* Description: DCDC power-up force register. */
3261 /* Description: PPI controller. */
3264 /* Description: Channel enable. */
3435 /* Description: Channel enable set. */
3634 /* Description: Channel enable clear. */
3833 /* Description: Channel group configuration. */
4005 /* Description: Rotary decoder. */
4008 /* Description: Shortcuts for the QDEC. */
4023 /* Description: Interrupt enable set register. */
4047 /* Description: Interrupt enable clear register. */
4071 /* Description: Enable the QDEC. */
4080 /* Description: LED output pin polarity. */
4089 /* Description: Sample period. */
4104 /* Description: Motion sample value. */
4111 /* Description: Number of samples to generate an EVENT_REPORTRDY. */
4126 /* Description: Enable debouncer input filters. */
4135 /* Description: Time LED is switched ON before the sample. */
4142 /* Description: Accumulated double (error) transitions register. */
4149 /* Description: Snapshot of ACCDBL register. Value generated by the TASKS_READCLEACC task. */
4156 /* Description: Peripheral power control. */
4166 /* Description: The radio. */
4169 /* Description: Shortcuts for the radio. */
4220 /* Description: Interrupt enable set register. */
4286 /* Description: Interrupt enable clear register. */
4352 /* Description: CRC status of received packet. */
4361 /* Description: Received address. */
4368 /* Description: Received CRC. */
4375 /* Description: Device address match index. */
4382 /* Description: Frequency. */
4389 /* Description: Output power. */
4404 /* Description: Data rate and modulation. */
4415 /* Description: Packet configuration 0. */
4430 /* Description: Packet configuration 1. */
4457 /* Description: Prefixes bytes for logical addresses 0 to 3. */
4476 /* Description: Prefixes bytes for logical addresses 4 to 7. */
4495 /* Description: Transmit address select. */
4502 /* Description: Receive address select. */
4553 /* Description: CRC configuration. */
4570 /* Description: CRC polynomial. */
4577 /* Description: CRC initial value. */
4584 /* Description: Test features enable register. */
4599 /* Description: Inter Frame Spacing in microseconds. */
4606 /* Description: RSSI sample. */
4613 /* Description: Current radio state. */
4629 /* Description: Data whitening initial value. */
4636 /* Description: Device address prefix. */
4643 /* Description: Device address match configuration. */
4726 /* Description: Trim value override register 0. */
4733 /* Description: Trim value override register 1. */
4740 /* Description: Trim value override register 2. */
4747 /* Description: Trim value override register 3. */
4754 /* Description: Trim value override register 4. */
4767 /* Description: Peripheral power control. */
4777 /* Description: Random Number Generator. */
4780 /* Description: Shortcuts for the RNG. */
4789 /* Description: Interrupt enable set register */
4799 /* Description: Interrupt enable clear register */
4809 /* Description: Configuration register. */
4818 /* Description: RNG random number. */
4825 /* Description: Peripheral power control. */
4835 /* Description: Real time counter 0. */
4838 /* Description: Interrupt enable set register. */
4883 /* Description: Interrupt enable clear register. */
4928 /* Description: Configures event enable routing to PPI for each RTC event. */
4967 /* Description: Enable events routing to PPI. The reading of this register gives the value of EVTEN…
5012 /* Description: Disable events routing to PPI. The reading of this register gives the value of EVTE…
5057 /* Description: Current COUNTER value. */
5064 /* Description: 12-bit prescaler for COUNTER frequency (32768/(PRESCALER+1)). Must be written when …
5071 /* Description: Capture/compare registers. */
5078 /* Description: Peripheral power control. */
5088 /* Description: SPI master 0. */
5091 /* Description: Interrupt enable set register. */
5101 /* Description: Interrupt enable clear register. */
5111 /* Description: Enable SPI. */
5120 /* Description: RX data. */
5127 /* Description: TX data. */
5134 /* Description: SPI frequency */
5148 /* Description: Configuration register. */
5169 /* Description: Peripheral power control. */
5179 /* Description: SPI slave 1. */
5182 /* Description: Shortcuts for SPIS. */
5191 /* Description: Interrupt enable set register. */
5215 /* Description: Interrupt enable clear register. */
5239 /* Description: Semaphore status. */
5250 /* Description: Status from last transaction. */
5267 /* Description: Enable SPIS. */
5276 /* Description: Maximum number of bytes in the receive buffer. */
5283 /* Description: Number of bytes received in last granted transaction. */
5290 /* Description: Maximum number of bytes in the transmit buffer. */
5297 /* Description: Number of bytes transmitted in last granted transaction. */
5304 /* Description: Configuration register. */
5325 /* Description: Default character. */
5332 /* Description: Over-read character. */
5339 /* Description: Peripheral power control. */
5349 /* Description: Temperature Sensor. */
5352 /* Description: Interrupt enable set register. */
5362 /* Description: Interrupt enable clear register. */
5372 /* Description: Peripheral power control. */
5382 /* Description: Timer 0. */
5385 /* Description: Shortcuts for Timer. */
5436 /* Description: Interrupt enable set register. */
5467 /* Description: Interrupt enable clear register. */
5498 /* Description: Timer Mode selection. */
5507 /* Description: Sets timer behaviour. */
5518 /* Description: 4-bit prescaler to source clock frequency (max value 9). Source clock frequency is …
5525 /* Description: Peripheral power control. */
5535 /* Description: Two-wire interface master 0. */
5538 /* Description: Shortcuts for TWI. */
5553 /* Description: Interrupt enable set register. */
5598 /* Description: Interrupt enable clear register. */
5643 /* Description: Two-wire error source. Write error field to 1 to clear error. */
5667 /* Description: Enable two-wire master. */
5676 /* Description: RX data register. */
5683 /* Description: TX data register. */
5690 /* Description: Two-wire frequency. */
5700 /* Description: Address used in the two-wire transfer. */
5707 /* Description: Peripheral power control. */
5717 /* Description: Universal Asynchronous Receiver/Transmitter. */
5720 /* Description: Shortcuts for UART. */
5735 /* Description: Interrupt enable set register. */
5780 /* Description: Interrupt enable clear register. */
5825 /* Description: Error source. Write error field to 1 to clear error. */
5856 /* Description: Enable UART and acquire IOs. */
5865 /* Description: RXD register. On read action the buffer pointer is displaced. Once read the charact…
5872 /* Description: TXD register. */
5879 /* Description: UART Baudrate. */
5904 /* Description: Configuration of parity and hardware flow control register. */
5919 /* Description: Peripheral power control. */
5929 /* Description: User Information Configuration. */
5932 /* Description: Readback protection configuration. */
5947 /* Description: Reset value for CLOCK XTALFREQ register. */
5956 /* Description: Firmware ID. */
5964 /* Description: Watchdog Timer. */
5967 /* Description: Interrupt enable set register. */
5977 /* Description: Interrupt enable clear register. */
5987 /* Description: Watchdog running status. */
5996 /* Description: Request status. */
6047 /* Description: Reload request enable. */
6098 /* Description: Configuration register. */
6113 /* Description: Reload requests registers. */
6121 /* Description: Peripheral power control. */