Lines Matching full:15

90 #define WM9081_SW_RST_DEV_ID1_MASK              0xFFFF  /* SW_RST_DEV_ID1 - [15:0] */
91 #define WM9081_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
92 #define WM9081_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
348 #define WM9081_FLL_K_MASK 0xFFFF /* FLL_K - [15:0] */
349 #define WM9081_FLL_K_SHIFT 0 /* FLL_K - [15:0] */
350 #define WM9081_FLL_K_WIDTH 16 /* FLL_K - [15:0] */
479 #define WM9081_IRQ_POL_SHIFT 15 /* IRQ_POL */
517 #define WM9081_DRC_ENA_SHIFT 15 /* DRC_ENA */
538 #define WM9081_DRC_ATK_MASK 0xF000 /* DRC_ATK - [15:12] */
539 #define WM9081_DRC_ATK_SHIFT 12 /* DRC_ATK - [15:12] */
540 #define WM9081_DRC_ATK_WIDTH 4 /* DRC_ATK - [15:12] */
582 #define WM9081_WSEQ_ENA_SHIFT 15 /* WSEQ_ENA */
630 #define WM9081_EQ_B1_GAIN_MASK 0xF800 /* EQ_B1_GAIN - [15:11] */
631 #define WM9081_EQ_B1_GAIN_SHIFT 11 /* EQ_B1_GAIN - [15:11] */
632 #define WM9081_EQ_B1_GAIN_WIDTH 5 /* EQ_B1_GAIN - [15:11] */
647 #define WM9081_EQ_B3_GAIN_MASK 0xF800 /* EQ_B3_GAIN - [15:11] */
648 #define WM9081_EQ_B3_GAIN_SHIFT 11 /* EQ_B3_GAIN - [15:11] */
649 #define WM9081_EQ_B3_GAIN_WIDTH 5 /* EQ_B3_GAIN - [15:11] */
657 #define WM9081_EQ_B1_A_MASK 0xFFFF /* EQ_B1_A - [15:0] */
658 #define WM9081_EQ_B1_A_SHIFT 0 /* EQ_B1_A - [15:0] */
659 #define WM9081_EQ_B1_A_WIDTH 16 /* EQ_B1_A - [15:0] */
664 #define WM9081_EQ_B1_B_MASK 0xFFFF /* EQ_B1_B - [15:0] */
665 #define WM9081_EQ_B1_B_SHIFT 0 /* EQ_B1_B - [15:0] */
666 #define WM9081_EQ_B1_B_WIDTH 16 /* EQ_B1_B - [15:0] */
671 #define WM9081_EQ_B1_PG_MASK 0xFFFF /* EQ_B1_PG - [15:0] */
672 #define WM9081_EQ_B1_PG_SHIFT 0 /* EQ_B1_PG - [15:0] */
673 #define WM9081_EQ_B1_PG_WIDTH 16 /* EQ_B1_PG - [15:0] */
678 #define WM9081_EQ_B2_A_MASK 0xFFFF /* EQ_B2_A - [15:0] */
679 #define WM9081_EQ_B2_A_SHIFT 0 /* EQ_B2_A - [15:0] */
680 #define WM9081_EQ_B2_A_WIDTH 16 /* EQ_B2_A - [15:0] */
685 #define WM9081_EQ_B2_B_MASK 0xFFFF /* EQ_B2_B - [15:0] */
686 #define WM9081_EQ_B2_B_SHIFT 0 /* EQ_B2_B - [15:0] */
687 #define WM9081_EQ_B2_B_WIDTH 16 /* EQ_B2_B - [15:0] */
692 #define WM9081_EQ_B2_C_MASK 0xFFFF /* EQ_B2_C - [15:0] */
693 #define WM9081_EQ_B2_C_SHIFT 0 /* EQ_B2_C - [15:0] */
694 #define WM9081_EQ_B2_C_WIDTH 16 /* EQ_B2_C - [15:0] */
699 #define WM9081_EQ_B2_PG_MASK 0xFFFF /* EQ_B2_PG - [15:0] */
700 #define WM9081_EQ_B2_PG_SHIFT 0 /* EQ_B2_PG - [15:0] */
701 #define WM9081_EQ_B2_PG_WIDTH 16 /* EQ_B2_PG - [15:0] */
706 #define WM9081_EQ_B4_A_MASK 0xFFFF /* EQ_B4_A - [15:0] */
707 #define WM9081_EQ_B4_A_SHIFT 0 /* EQ_B4_A - [15:0] */
708 #define WM9081_EQ_B4_A_WIDTH 16 /* EQ_B4_A - [15:0] */
713 #define WM9081_EQ_B4_B_MASK 0xFFFF /* EQ_B4_B - [15:0] */
714 #define WM9081_EQ_B4_B_SHIFT 0 /* EQ_B4_B - [15:0] */
715 #define WM9081_EQ_B4_B_WIDTH 16 /* EQ_B4_B - [15:0] */
720 #define WM9081_EQ_B4_C_MASK 0xFFFF /* EQ_B4_C - [15:0] */
721 #define WM9081_EQ_B4_C_SHIFT 0 /* EQ_B4_C - [15:0] */
722 #define WM9081_EQ_B4_C_WIDTH 16 /* EQ_B4_C - [15:0] */
727 #define WM9081_EQ_B4_PG_MASK 0xFFFF /* EQ_B4_PG - [15:0] */
728 #define WM9081_EQ_B4_PG_SHIFT 0 /* EQ_B4_PG - [15:0] */
729 #define WM9081_EQ_B4_PG_WIDTH 16 /* EQ_B4_PG - [15:0] */
734 #define WM9081_EQ_B3_A_MASK 0xFFFF /* EQ_B3_A - [15:0] */
735 #define WM9081_EQ_B3_A_SHIFT 0 /* EQ_B3_A - [15:0] */
736 #define WM9081_EQ_B3_A_WIDTH 16 /* EQ_B3_A - [15:0] */
739 * R56 (0x38) - EQ 15
741 #define WM9081_EQ_B3_B_MASK 0xFFFF /* EQ_B3_B - [15:0] */
742 #define WM9081_EQ_B3_B_SHIFT 0 /* EQ_B3_B - [15:0] */
743 #define WM9081_EQ_B3_B_WIDTH 16 /* EQ_B3_B - [15:0] */
748 #define WM9081_EQ_B3_C_MASK 0xFFFF /* EQ_B3_C - [15:0] */
749 #define WM9081_EQ_B3_C_SHIFT 0 /* EQ_B3_C - [15:0] */
750 #define WM9081_EQ_B3_C_WIDTH 16 /* EQ_B3_C - [15:0] */
755 #define WM9081_EQ_B3_PG_MASK 0xFFFF /* EQ_B3_PG - [15:0] */
756 #define WM9081_EQ_B3_PG_SHIFT 0 /* EQ_B3_PG - [15:0] */
757 #define WM9081_EQ_B3_PG_WIDTH 16 /* EQ_B3_PG - [15:0] */
762 #define WM9081_EQ_B5_A_MASK 0xFFFF /* EQ_B5_A - [15:0] */
763 #define WM9081_EQ_B5_A_SHIFT 0 /* EQ_B5_A - [15:0] */
764 #define WM9081_EQ_B5_A_WIDTH 16 /* EQ_B5_A - [15:0] */
769 #define WM9081_EQ_B5_B_MASK 0xFFFF /* EQ_B5_B - [15:0] */
770 #define WM9081_EQ_B5_B_SHIFT 0 /* EQ_B5_B - [15:0] */
771 #define WM9081_EQ_B5_B_WIDTH 16 /* EQ_B5_B - [15:0] */
776 #define WM9081_EQ_B5_PG_MASK 0xFFFF /* EQ_B5_PG - [15:0] */
777 #define WM9081_EQ_B5_PG_SHIFT 0 /* EQ_B5_PG - [15:0] */
778 #define WM9081_EQ_B5_PG_WIDTH 16 /* EQ_B5_PG - [15:0] */