Lines Matching full:bitblt

108 #define S1DREG_BBLT_CTL0		0x0100	/* BitBLT Control Register 0 */
109 #define S1DREG_BBLT_CTL1		0x0101	/* BitBLT Control Register 1 */
110 #define S1DREG_BBLT_CC_EXP		0x0102	/* BitBLT Code/Color Expansion Register */
111 #define S1DREG_BBLT_OP			0x0103	/* BitBLT Operation Register */
112 #define S1DREG_BBLT_SRC_START0		0x0104	/* BitBLT Source Start Address Register 0 */
113 #define S1DREG_BBLT_SRC_START1		0x0105	/* BitBLT Source Start Address Register 1 */
114 #define S1DREG_BBLT_SRC_START2		0x0106	/* BitBLT Source Start Address Register 2 */
115 #define S1DREG_BBLT_DST_START0		0x0108	/* BitBLT Destination Start Address Register 0 */
116 #define S1DREG_BBLT_DST_START1		0x0109	/* BitBLT Destination Start Address Register 1 */
117 #define S1DREG_BBLT_DST_START2		0x010A	/* BitBLT Destination Start Address Register 2 */
118 #define S1DREG_BBLT_MEM_OFF0		0x010C	/* BitBLT Memory Address Offset Register 0 */
119 #define S1DREG_BBLT_MEM_OFF1		0x010D	/* BitBLT Memory Address Offset Register 1 */
120 #define S1DREG_BBLT_WIDTH0		0x0110	/* BitBLT Width Register 0 */
121 #define S1DREG_BBLT_WIDTH1		0x0111	/* BitBLT Width Register 1 */
122 #define S1DREG_BBLT_HEIGHT0		0x0112	/* BitBLT Height Register 0 */
123 #define S1DREG_BBLT_HEIGHT1		0x0113	/* BitBLT Height Register 1 */
124 #define S1DREG_BBLT_BGC0		0x0114	/* BitBLT Background Color Register 0 */
125 #define S1DREG_BBLT_BGC1		0x0115	/* BitBLT Background Color Register 1 */
126 #define S1DREG_BBLT_FGC0		0x0118	/* BitBLT Foreground Color Register 0 */
127 #define S1DREG_BBLT_FGC1		0x0119	/* BitBLT Foreground Color Register 1 */