Lines Matching +full:bank +full:- +full:width
1 /* SPDX-License-Identifier: GPL-2.0-only */
47 /* argument: Integer, range is HW-dependant */
49 /* argument: Integer, range is HW-dependant */
51 /* argument: Integer, range is HW-dependant */
53 /* argument: Integer, range is HW-dependant */
55 /* argument: Integer, range is HW-dependant */
75 * struct tegra_function - Tegra pinctrl mux function
87 * struct tegra_pingroup - Tegra pin group
95 * @mux_bank: Mux register bank.
97 * @pupd_reg: Pull-up/down register offset.
98 * @pupd_bank: Pull-up/down register bank.
99 * @pupd_bit: Pull-up/down register bit.
100 * @tri_reg: Tri-state register offset.
101 * @tri_bank: Tri-state register bank.
102 * @tri_bit: Tri-state register bit.
103 * @einput_bit: Enable-input register bit.
104 * @odrain_bit: Open-drain register bit.
111 * @drv_bank: Drive fields register bank.
117 * @drvdn_width: Drive Down field width.
119 * @drvup_width: Drive Up field width.
121 * @slwr_width: Slew Rising field width.
123 * @slwf_width: Slew Falling field width.
128 * -1 in a *_reg field means that feature is unsupported for this group.
129 * *_bank and *_reg values are irrelevant when *_reg is -1.
130 * When *_reg is valid, *_bit may be -1 to indicate an unsupported feature.
135 * such as pull-up/down, tri-state, etc. Tegra's pin controller is complex;
178 * struct tegra_pinctrl_soc_data - Tegra pin controller driver configuration