Lines Matching +full:on +full:- +full:chip
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
7 * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
14 #include "chip.h"
28 /* - Modes with PHY suffix use output instead of input clock
29 * - Modes without RMII or RGMII use MII
30 * - Modes without speed do not have a fixed speed specified in the manual
31 * ("DC to x MHz" - variable clock support?)
325 * 0..3 LED 0 control selector on ports 1-5
326 * 4..7 LED 1 control selector on ports 1-4 on port 5 this controls LED 0 of port 6
329 …* 0 1-4 0 Link/Act/Speed by Blink Rate (off=no link, on=link, blink=activity, blink speed=lin…
330 * 1-4 1 Port 2's Special LED
331 * 5-6 0 Port 5 Link/Act (off=no link, on=link, blink=activity)
332 * 5-6 1 Port 6 Link/Act (off=no link, on=link 1000, blink=activity)
333 * 1 1-4 0 100/1000 Link/Act (off=no link, on=100 or 1000 link, blink=activity)
334 * 1-4 1 10/100 Link Act (off=no link, on=10 or 100 link, blink=activity)
335 * 5-6 0 Fiber 100 Link/Act (off=no link, on=link 100, blink=activity)
336 * 5-6 1 Fiber 1000 Link/Act (off=no link, on=link 1000, blink=activity)
337 * 2 1-4 0 1000 Link/Act (off=no link, on=link 1000, blink=activity)
338 * 1-4 1 10/100 Link/Act (off=no link, on=10 or 100 link, blink=activity)
339 * 5-6 0 Fiber 1000 Link/Act (off=no link, on=link 1000, blink=activity)
340 * 5-6 1 Fiber 100 Link/Act (off=no link, on=link 100, blink=activity)
341 * 3 1-4 0 Link/Act (off=no link, on=link, blink=activity)
342 * 1-4 1 1000 Link (off=no link, on=1000 link)
343 * 5-6 0 Port 0's Special LED
344 * 5-6 1 Fiber Link (off=no link, on=link)
345 * 4 1-4 0 Port 0's Special LED
346 * 1-4 1 Port 1's Special LED
347 * 5-6 0 Port 1's Special LED
348 * 5-6 1 Port 5 Link/Act (off=no link, on=link, blink=activity)
349 * 5 1-4 0 Reserved
350 * 1-4 1 Reserved
351 * 5-6 0 Port 2's Special LED
352 * 5-6 1 Port 6 Link (off=no link, on=link)
353 * 6 1-4 0 Duplex/Collision (off=half-duplex,on=full-duplex,blink=collision)
354 * 1-4 1 10/1000 Link/Act (off=no link, on=10 or 1000 link, blink=activity)
355 * 5-6 0 Port 5 Duplex/Collision (off=half-duplex, on=full-duplex, blink=col)
356 * 5-6 1 Port 6 Duplex/Collision (off=half-duplex, on=full-duplex, blink=col)
357 * 7 1-4 0 10/1000 Link/Act (off=no link, on=10 or 1000 link, blink=activity)
358 * 1-4 1 10/1000 Link (off=no link, on=10 or 1000 link)
359 …* 5-6 0 Port 5 Link/Act/Speed by Blink rate (off=no link, on=link, blink=activity, blink sp…
360 …* 5-6 1 Port 6 Link/Act/Speed by Blink rate (off=no link, on=link, blink=activity, blink s…
361 * 8 1-4 0 Link (off=no link, on=link)
362 * 1-4 1 Activity (off=no link, blink on=activity)
363 * 5-6 0 Port 6 Link/Act (off=no link, on=link, blink=activity)
364 * 5-6 1 Port 0's Special LED
365 * 9 1-4 0 10 Link (off=no link, on=10 link)
366 * 1-4 1 100 Link (off=no link, on=100 link)
367 * 5-6 0 Reserved
368 * 5-6 1 Port 1's Special LED
369 * a 1-4 0 10 Link/Act (off=no link, on=10 link, blink=activity)
370 * 1-4 1 100 Link/Act (off=no link, on=100 link, blink=activity)
371 * 5-6 0 Reserved
372 * 5-6 1 Port 2's Special LED
373 * b 1-4 0 100/1000 Link (off=no link, on=100 or 1000 link)
374 * 1-4 1 10/100 Link (off=no link, on=100 link, blink=activity)
375 * 5-6 0 Reserved
376 * 5-6 1 Reserved
377 * c * * PTP Act (blink on=PTP activity)
380 * f * * Force On
416 /* Pulse Stretch Selection for all LED's on this port */
422 /* Blink Rate Selection for all LEDs on this port */
429 /* Control for Special LED (Index 0x7 of LED Control on Port0) */
431 /* Control for Special LED (Index 0x7 of LED Control on Port 1) */
433 /* Control for Special LED (Index 0x7 of LED Control on Port 2) */
450 /* Offset 0x18: Port IEEE Priority Remapping Registers (0-3) */
453 /* Offset 0x19: Port IEEE Priority Remapping Registers (4-7) */
468 int mv88e6xxx_port_read(struct mv88e6xxx_chip *chip, int port, int reg,
470 int mv88e6xxx_port_write(struct mv88e6xxx_chip *chip, int port, int reg,
472 int mv88e6xxx_port_wait_bit(struct mv88e6xxx_chip *chip, int port, int reg,
475 int mv88e6185_port_set_pause(struct mv88e6xxx_chip *chip, int port,
477 int mv88e6320_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port,
479 int mv88e6352_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port,
481 int mv88e6390_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port,
484 int mv88e6xxx_port_set_link(struct mv88e6xxx_chip *chip, int port, int link);
486 int mv88e6xxx_port_sync_link(struct mv88e6xxx_chip *chip, int port, unsigned int mode, bool isup);
487 int mv88e6185_port_sync_link(struct mv88e6xxx_chip *chip, int port, unsigned int mode, bool isup);
489 int mv88e6185_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
491 int mv88e6250_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
493 int mv88e6341_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
495 int mv88e6352_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
497 int mv88e6390_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
499 int mv88e6390x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
501 int mv88e6393x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
504 phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,
506 phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,
508 phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
510 phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
513 int mv88e6xxx_port_set_state(struct mv88e6xxx_chip *chip, int port, u8 state);
515 int mv88e6xxx_port_set_vlan_map(struct mv88e6xxx_chip *chip, int port, u16 map);
517 int mv88e6xxx_port_get_fid(struct mv88e6xxx_chip *chip, int port, u16 *fid);
518 int mv88e6xxx_port_set_fid(struct mv88e6xxx_chip *chip, int port, u16 fid);
520 int mv88e6xxx_port_get_pvid(struct mv88e6xxx_chip *chip, int port, u16 *pvid);
521 int mv88e6xxx_port_set_pvid(struct mv88e6xxx_chip *chip, int port, u16 pvid);
523 int mv88e6xxx_port_set_lock(struct mv88e6xxx_chip *chip, int port,
526 int mv88e6xxx_port_set_8021q_mode(struct mv88e6xxx_chip *chip, int port,
528 int mv88e6095_port_tag_remap(struct mv88e6xxx_chip *chip, int port);
529 int mv88e6390_port_tag_remap(struct mv88e6xxx_chip *chip, int port);
530 int mv88e6xxx_port_set_egress_mode(struct mv88e6xxx_chip *chip, int port,
532 int mv88e6085_port_set_frame_mode(struct mv88e6xxx_chip *chip, int port,
534 int mv88e6351_port_set_frame_mode(struct mv88e6xxx_chip *chip, int port,
536 int mv88e6185_port_set_forward_unknown(struct mv88e6xxx_chip *chip,
538 int mv88e6185_port_set_default_forward(struct mv88e6xxx_chip *chip,
540 int mv88e6352_port_set_ucast_flood(struct mv88e6xxx_chip *chip, int port,
542 int mv88e6352_port_set_mcast_flood(struct mv88e6xxx_chip *chip, int port,
544 int mv88e6352_port_set_policy(struct mv88e6xxx_chip *chip, int port,
547 int mv88e6393x_port_set_policy(struct mv88e6xxx_chip *chip, int port,
550 int mv88e6351_port_set_ether_type(struct mv88e6xxx_chip *chip, int port,
552 int mv88e6393x_set_egress_port(struct mv88e6xxx_chip *chip,
555 int mv88e6393x_port_set_upstream_port(struct mv88e6xxx_chip *chip, int port,
557 int mv88e6393x_port_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip);
558 int mv88e6393x_port_set_ether_type(struct mv88e6xxx_chip *chip, int port,
560 int mv88e6xxx_port_set_message_port(struct mv88e6xxx_chip *chip, int port,
562 int mv88e6xxx_port_set_trunk(struct mv88e6xxx_chip *chip, int port,
564 int mv88e6165_port_set_jumbo_size(struct mv88e6xxx_chip *chip, int port,
566 int mv88e6095_port_egress_rate_limiting(struct mv88e6xxx_chip *chip, int port);
567 int mv88e6097_port_egress_rate_limiting(struct mv88e6xxx_chip *chip, int port);
568 int mv88e6xxx_port_set_assoc_vector(struct mv88e6xxx_chip *chip, int port,
570 int mv88e6097_port_pause_limit(struct mv88e6xxx_chip *chip, int port, u8 in,
572 int mv88e6390_port_pause_limit(struct mv88e6xxx_chip *chip, int port, u8 in,
574 int mv88e6341_port_set_cmode(struct mv88e6xxx_chip *chip, int port,
576 int mv88e6390_port_set_cmode(struct mv88e6xxx_chip *chip, int port,
578 int mv88e6390x_port_set_cmode(struct mv88e6xxx_chip *chip, int port,
580 int mv88e6393x_port_set_cmode(struct mv88e6xxx_chip *chip, int port,
582 int mv88e6185_port_get_cmode(struct mv88e6xxx_chip *chip, int port, u8 *cmode);
583 int mv88e6352_port_get_cmode(struct mv88e6xxx_chip *chip, int port, u8 *cmode);
585 int mv88e6xxx_port_setup_leds(struct mv88e6xxx_chip *chip, int port);
587 static inline int mv88e6xxx_port_setup_leds(struct mv88e6xxx_chip *chip, in mv88e6xxx_port_setup_leds() argument
593 int mv88e6xxx_port_drop_untagged(struct mv88e6xxx_chip *chip, int port,
595 int mv88e6xxx_port_set_map_da(struct mv88e6xxx_chip *chip, int port, bool map);
596 int mv88e6095_port_set_upstream_port(struct mv88e6xxx_chip *chip, int port,
598 int mv88e6xxx_port_set_mirror(struct mv88e6xxx_chip *chip, int port,
602 int mv88e6xxx_port_disable_learn_limit(struct mv88e6xxx_chip *chip, int port);
603 int mv88e6xxx_port_disable_pri_override(struct mv88e6xxx_chip *chip, int port);
605 int mv88e6xxx_port_hidden_write(struct mv88e6xxx_chip *chip, int block,
607 int mv88e6xxx_port_hidden_wait(struct mv88e6xxx_chip *chip);
608 int mv88e6xxx_port_hidden_read(struct mv88e6xxx_chip *chip, int block, int port,