173 static void setup_decoder_defaults(struct au8522_state *state, bool is_svideo)  in setup_decoder_defaults()  argument
179 	au8522_writereg(state, AU8522_TVDEC_SHARPNESSREG009H, 0x07);  in setup_decoder_defaults()
180 	au8522_writereg(state, AU8522_TVDEC_BRIGHTNESS_REG00AH, 0xed);  in setup_decoder_defaults()
181 	au8522_writereg(state, AU8522_TVDEC_CONTRAST_REG00BH, 0x79);  in setup_decoder_defaults()
182 	au8522_writereg(state, AU8522_TVDEC_SATURATION_CB_REG00CH, 0x80);  in setup_decoder_defaults()
183 	au8522_writereg(state, AU8522_TVDEC_SATURATION_CR_REG00DH, 0x80);  in setup_decoder_defaults()
184 	au8522_writereg(state, AU8522_TVDEC_HUE_H_REG00EH, 0x00);  in setup_decoder_defaults()
185 	au8522_writereg(state, AU8522_TVDEC_HUE_L_REG00FH, 0x00);  in setup_decoder_defaults()
188 	au8522_writereg(state, AU8522_TVDEC_INT_MASK_REG010H, 0x00);  in setup_decoder_defaults()
191 		au8522_writereg(state, AU8522_VIDEO_MODE_REG011H, 0x04);  in setup_decoder_defaults()
193 		au8522_writereg(state, AU8522_VIDEO_MODE_REG011H, 0x00);  in setup_decoder_defaults()
195 	au8522_writereg(state, AU8522_TVDEC_PGA_REG012H,  in setup_decoder_defaults()
197 	au8522_writereg(state, AU8522_TVDEC_COMB_MODE_REG015H,  in setup_decoder_defaults()
199 	au8522_writereg(state, AU8522_TVDED_DBG_MODE_REG060H,  in setup_decoder_defaults()
202 	if (state->std == V4L2_STD_PAL_M) {  in setup_decoder_defaults()
203 		au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL1_REG061H,  in setup_decoder_defaults()
207 		au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL2_REG062H,  in setup_decoder_defaults()
211 		au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL1_REG061H,  in setup_decoder_defaults()
215 		au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL2_REG062H,  in setup_decoder_defaults()
218 	au8522_writereg(state, AU8522_TVDEC_VCR_DET_LLIM_REG063H,  in setup_decoder_defaults()
220 	au8522_writereg(state, AU8522_TVDEC_VCR_DET_HLIM_REG064H,  in setup_decoder_defaults()
222 	au8522_writereg(state, AU8522_TVDEC_COMB_VDIF_THR1_REG065H,  in setup_decoder_defaults()
224 	au8522_writereg(state, AU8522_TVDEC_COMB_VDIF_THR2_REG066H,  in setup_decoder_defaults()
226 	au8522_writereg(state, AU8522_TVDEC_COMB_VDIF_THR3_REG067H,  in setup_decoder_defaults()
228 	au8522_writereg(state, AU8522_TVDEC_COMB_NOTCH_THR_REG068H,  in setup_decoder_defaults()
230 	au8522_writereg(state, AU8522_TVDEC_COMB_HDIF_THR1_REG069H,  in setup_decoder_defaults()
232 	au8522_writereg(state, AU8522_TVDEC_COMB_HDIF_THR2_REG06AH,  in setup_decoder_defaults()
234 	au8522_writereg(state, AU8522_TVDEC_COMB_HDIF_THR3_REG06BH,  in setup_decoder_defaults()
237 		au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH,  in setup_decoder_defaults()
239 		au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH,  in setup_decoder_defaults()
242 		au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH,  in setup_decoder_defaults()
244 		au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH,  in setup_decoder_defaults()
247 	au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR3_REG06EH,  in setup_decoder_defaults()
249 	au8522_writereg(state, AU8522_TVDEC_UV_SEP_THR_REG06FH,  in setup_decoder_defaults()
251 	au8522_writereg(state, AU8522_TVDEC_COMB_DC_THR1_NTSC_REG070H,  in setup_decoder_defaults()
253 	au8522_writereg(state, AU8522_REG071H, AU8522_REG071H_CVBS);  in setup_decoder_defaults()
254 	au8522_writereg(state, AU8522_REG072H, AU8522_REG072H_CVBS);  in setup_decoder_defaults()
255 	au8522_writereg(state, AU8522_TVDEC_COMB_DC_THR2_NTSC_REG073H,  in setup_decoder_defaults()
257 	au8522_writereg(state, AU8522_REG074H, AU8522_REG074H_CVBS);  in setup_decoder_defaults()
258 	au8522_writereg(state, AU8522_REG075H, AU8522_REG075H_CVBS);  in setup_decoder_defaults()
259 	au8522_writereg(state, AU8522_TVDEC_DCAGC_CTRL_REG077H,  in setup_decoder_defaults()
261 	au8522_writereg(state, AU8522_TVDEC_PIC_START_ADJ_REG078H,  in setup_decoder_defaults()
263 	au8522_writereg(state, AU8522_TVDEC_AGC_HIGH_LIMIT_REG079H,  in setup_decoder_defaults()
265 	au8522_writereg(state, AU8522_TVDEC_MACROVISION_SYNC_THR_REG07AH,  in setup_decoder_defaults()
267 	au8522_writereg(state, AU8522_TVDEC_INTRP_CTRL_REG07BH,  in setup_decoder_defaults()
269 	au8522_writereg(state, AU8522_TVDEC_AGC_LOW_LIMIT_REG0E4H,  in setup_decoder_defaults()
271 	au8522_writereg(state, AU8522_TOREGAAGC_REG0E5H,  in setup_decoder_defaults()
273 	au8522_writereg(state, AU8522_REG016H, AU8522_REG016H_CVBS);  in setup_decoder_defaults()
284 		au8522_writereg(state, filter_coef[i].reg_name,  in setup_decoder_defaults()
290 	au8522_writereg(state, AU8522_REG42EH, 0x87);  in setup_decoder_defaults()
291 	au8522_writereg(state, AU8522_REG42FH, 0xa2);  in setup_decoder_defaults()
292 	au8522_writereg(state, AU8522_REG430H, 0xbf);  in setup_decoder_defaults()
293 	au8522_writereg(state, AU8522_REG431H, 0xcb);  in setup_decoder_defaults()
294 	au8522_writereg(state, AU8522_REG432H, 0xa1);  in setup_decoder_defaults()
295 	au8522_writereg(state, AU8522_REG433H, 0x41);  in setup_decoder_defaults()
296 	au8522_writereg(state, AU8522_REG434H, 0x88);  in setup_decoder_defaults()
297 	au8522_writereg(state, AU8522_REG435H, 0xc2);  in setup_decoder_defaults()
298 	au8522_writereg(state, AU8522_REG436H, 0x3c);  in setup_decoder_defaults()
301 static void au8522_setup_cvbs_mode(struct au8522_state *state, u8 input_mode)  in au8522_setup_cvbs_mode()  argument
304 	au8522_writereg(state, AU8522_MODULE_CLOCK_CONTROL_REG0A3H,  in au8522_setup_cvbs_mode()
308 	au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x00);  in au8522_setup_cvbs_mode()
311 	au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x00);  in au8522_setup_cvbs_mode()
313 	au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode);  in au8522_setup_cvbs_mode()
315 	setup_decoder_defaults(state, false);  in au8522_setup_cvbs_mode()
317 	au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,  in au8522_setup_cvbs_mode()
321 static void au8522_setup_cvbs_tuner_mode(struct au8522_state *state,  in au8522_setup_cvbs_tuner_mode()  argument
325 	au8522_writereg(state, AU8522_MODULE_CLOCK_CONTROL_REG0A3H,  in au8522_setup_cvbs_tuner_mode()
330 	au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x00);  in au8522_setup_cvbs_tuner_mode()
333 	au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x0e);  in au8522_setup_cvbs_tuner_mode()
336 	au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x10);  in au8522_setup_cvbs_tuner_mode()
339 	au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode);  in au8522_setup_cvbs_tuner_mode()
341 	setup_decoder_defaults(state, false);  in au8522_setup_cvbs_tuner_mode()
343 	au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,  in au8522_setup_cvbs_tuner_mode()
347 static void au8522_setup_svideo_mode(struct au8522_state *state,  in au8522_setup_svideo_mode()  argument
350 	au8522_writereg(state, AU8522_MODULE_CLOCK_CONTROL_REG0A3H,  in au8522_setup_svideo_mode()
354 	au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode);  in au8522_setup_svideo_mode()
357 	au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x00);  in au8522_setup_svideo_mode()
360 	au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x00);  in au8522_setup_svideo_mode()
362 	setup_decoder_defaults(state, true);  in au8522_setup_svideo_mode()
364 	au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,  in au8522_setup_svideo_mode()
370 static void disable_audio_input(struct au8522_state *state)  in disable_audio_input()  argument
372 	au8522_writereg(state, AU8522_AUDIO_VOLUME_L_REG0F2H, 0x00);  in disable_audio_input()
373 	au8522_writereg(state, AU8522_AUDIO_VOLUME_R_REG0F3H, 0x00);  in disable_audio_input()
374 	au8522_writereg(state, AU8522_AUDIO_VOLUME_REG0F4H, 0x00);  in disable_audio_input()
376 	au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H, 0x04);  in disable_audio_input()
377 	au8522_writereg(state, AU8522_I2S_CTRL_2_REG112H, 0x02);  in disable_audio_input()
379 	au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,  in disable_audio_input()
384 static void set_audio_input(struct au8522_state *state)  in set_audio_input()  argument
386 	int aud_input = state->aud_input;  in set_audio_input()
393 		disable_audio_input(state);  in set_audio_input()
406 		au8522_writereg(state, lpfilter_coef[i].reg_name,  in set_audio_input()
411 	au8522_writereg(state, AU8522_AUDIO_VOLUME_L_REG0F2H, 0x7F);  in set_audio_input()
412 	au8522_writereg(state, AU8522_AUDIO_VOLUME_R_REG0F3H, 0x7F);  in set_audio_input()
413 	au8522_writereg(state, AU8522_AUDIO_VOLUME_REG0F4H, 0xff);  in set_audio_input()
416 	au8522_writereg(state, AU8522_REG0F9H, AU8522_REG0F9H_AUDIO);  in set_audio_input()
419 	au8522_writereg(state, AU8522_AUDIO_MODE_REG0F1H, 0x82);  in set_audio_input()
423 	au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, 0x9d);  in set_audio_input()
426 	au8522_writereg(state, AU8522_AUDIOFREQ_REG606H, 0x03);  in set_audio_input()
429 	au8522_writereg(state, AU8522_I2S_CTRL_2_REG112H, 0xc2);  in set_audio_input()
432 	au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H, 0x09);  in set_audio_input()
439 	struct au8522_state *state =  in au8522_s_ctrl()  local
444 		au8522_writereg(state, AU8522_TVDEC_BRIGHTNESS_REG00AH,  in au8522_s_ctrl()
448 		au8522_writereg(state, AU8522_TVDEC_CONTRAST_REG00BH,  in au8522_s_ctrl()
452 		au8522_writereg(state, AU8522_TVDEC_SATURATION_CB_REG00CH,  in au8522_s_ctrl()
454 		au8522_writereg(state, AU8522_TVDEC_SATURATION_CR_REG00DH,  in au8522_s_ctrl()
458 		au8522_writereg(state, AU8522_TVDEC_HUE_H_REG00EH,  in au8522_s_ctrl()
460 		au8522_writereg(state, AU8522_TVDEC_HUE_L_REG00FH,  in au8522_s_ctrl()
476 	struct au8522_state *state = to_state(sd);  in au8522_g_register()  local
478 	reg->val = au8522_readreg(state, reg->reg & 0xffff);  in au8522_g_register()
485 	struct au8522_state *state = to_state(sd);  in au8522_s_register()  local
487 	au8522_writereg(state, reg->reg, reg->val & 0xff);  in au8522_s_register()
492 static void au8522_video_set(struct au8522_state *state)  in au8522_video_set()  argument
496 	au8522_writereg(state, 0xa4, 1 << 5);  in au8522_video_set()
498 	switch (state->vid_input) {  in au8522_video_set()
501 		au8522_setup_cvbs_mode(state, input_mode);  in au8522_video_set()
505 		au8522_setup_cvbs_mode(state, input_mode);  in au8522_video_set()
509 		au8522_setup_cvbs_mode(state, input_mode);  in au8522_video_set()
513 		au8522_setup_cvbs_mode(state, input_mode);  in au8522_video_set()
517 		au8522_setup_svideo_mode(state, input_mode);  in au8522_video_set()
521 		au8522_setup_svideo_mode(state, input_mode);  in au8522_video_set()
526 		au8522_setup_cvbs_tuner_mode(state, input_mode);  in au8522_video_set()
533 	struct au8522_state *state = to_state(sd);  in au8522_s_stream()  local
541 		state->current_frequency = 0;  in au8522_s_stream()
543 		au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,  in au8522_s_stream()
547 		au8522_video_set(state);  in au8522_s_stream()
548 		set_audio_input(state);  in au8522_s_stream()
550 		state->operational_mode = AU8522_ANALOG_MODE;  in au8522_s_stream()
554 		au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,  in au8522_s_stream()
556 		state->operational_mode = AU8522_SUSPEND_MODE;  in au8522_s_stream()
564 	struct au8522_state *state = to_state(sd);  in au8522_s_video_routing()  local
570 		state->vid_input = input;  in au8522_s_video_routing()
577 	if (state->operational_mode == AU8522_ANALOG_MODE)  in au8522_s_video_routing()
578 		au8522_video_set(state);  in au8522_s_video_routing()
585 	struct au8522_state *state = to_state(sd);  in au8522_s_std()  local
590 	state->std = std;  in au8522_s_std()
592 	if (state->operational_mode == AU8522_ANALOG_MODE)  in au8522_s_std()
593 		au8522_video_set(state);  in au8522_s_std()
601 	struct au8522_state *state = to_state(sd);  in au8522_s_audio_routing()  local
603 	state->aud_input = input;  in au8522_s_audio_routing()
605 	if (state->operational_mode == AU8522_ANALOG_MODE)  in au8522_s_audio_routing()
606 		set_audio_input(state);  in au8522_s_audio_routing()
614 	struct au8522_state *state = to_state(sd);  in au8522_g_tuner()  local
619 	lock_status = au8522_readreg(state, 0x00);  in au8522_g_tuner()
620 	pll_status = au8522_readreg(state, 0x7e);  in au8522_g_tuner()
675 	struct au8522_state *state;  in au8522_probe()  local
690 	instance = au8522_get_state(&state, client->adapter, client->addr);  in au8522_probe()
705 	state->config.demod_address = 0x8e >> 1;  in au8522_probe()
706 	state->i2c = client->adapter;  in au8522_probe()
708 	sd = &state->sd;  in au8522_probe()
712 	state->pads[AU8522_PAD_IF_INPUT].flags = MEDIA_PAD_FL_SINK;  in au8522_probe()
713 	state->pads[AU8522_PAD_IF_INPUT].sig_type = PAD_SIGNAL_ANALOG;  in au8522_probe()
714 	state->pads[AU8522_PAD_VID_OUT].flags = MEDIA_PAD_FL_SOURCE;  in au8522_probe()
715 	state->pads[AU8522_PAD_VID_OUT].sig_type = PAD_SIGNAL_DV;  in au8522_probe()
716 	state->pads[AU8522_PAD_AUDIO_OUT].flags = MEDIA_PAD_FL_SOURCE;  in au8522_probe()
717 	state->pads[AU8522_PAD_AUDIO_OUT].sig_type = PAD_SIGNAL_AUDIO;  in au8522_probe()
720 	ret = media_entity_pads_init(&sd->entity, ARRAY_SIZE(state->pads),  in au8522_probe()
721 				state->pads);  in au8522_probe()
728 	hdl = &state->hdl;  in au8522_probe()
744 		au8522_release_state(state);  in au8522_probe()
748 	state->c = client;  in au8522_probe()
749 	state->std = V4L2_STD_NTSC_M;  in au8522_probe()
750 	state->vid_input = AU8522_COMPOSITE_CH1;  in au8522_probe()
751 	state->aud_input = AU8522_AUDIO_NONE;  in au8522_probe()
752 	state->id = 8522;  in au8522_probe()
753 	state->rev = 0;  in au8522_probe()
756 	au8522_writereg(state, 0x106, 1);  in au8522_probe()