121 int qib_pcie_ddinit(struct qib_devdata *dd, struct pci_dev *pdev,  in qib_pcie_ddinit()  argument
127 	dd->pcidev = pdev;  in qib_pcie_ddinit()
128 	pci_set_drvdata(pdev, dd);  in qib_pcie_ddinit()
133 	dd->kregbase = ioremap(addr, len);  in qib_pcie_ddinit()
134 	if (!dd->kregbase)  in qib_pcie_ddinit()
137 	dd->kregend = (u64 __iomem *)((void __iomem *) dd->kregbase + len);  in qib_pcie_ddinit()
138 	dd->physaddr = addr;        /* used for io_remap, etc. */  in qib_pcie_ddinit()
144 	dd->pcibar0 = addr;  in qib_pcie_ddinit()
145 	dd->pcibar1 = addr >> 32;  in qib_pcie_ddinit()
146 	dd->deviceid = ent->device; /* save for later use */  in qib_pcie_ddinit()
147 	dd->vendorid = ent->vendor;  in qib_pcie_ddinit()
157 void qib_pcie_ddcleanup(struct qib_devdata *dd)  in qib_pcie_ddcleanup()  argument
159 	u64 __iomem *base = (void __iomem *) dd->kregbase;  in qib_pcie_ddcleanup()
161 	dd->kregbase = NULL;  in qib_pcie_ddcleanup()
163 	if (dd->piobase)  in qib_pcie_ddcleanup()
164 		iounmap(dd->piobase);  in qib_pcie_ddcleanup()
165 	if (dd->userbase)  in qib_pcie_ddcleanup()
166 		iounmap(dd->userbase);  in qib_pcie_ddcleanup()
167 	if (dd->piovl15base)  in qib_pcie_ddcleanup()
168 		iounmap(dd->piovl15base);  in qib_pcie_ddcleanup()
170 	pci_disable_device(dd->pcidev);  in qib_pcie_ddcleanup()
171 	pci_release_regions(dd->pcidev);  in qib_pcie_ddcleanup()
173 	pci_set_drvdata(dd->pcidev, NULL);  in qib_pcie_ddcleanup()
181 static void qib_cache_msi_info(struct qib_devdata *dd, int pos)  in qib_cache_msi_info()  argument
183 	struct pci_dev *pdev = dd->pcidev;  in qib_cache_msi_info()
186 	pci_read_config_dword(pdev, pos + PCI_MSI_ADDRESS_LO, &dd->msi_lo);  in qib_cache_msi_info()
187 	pci_read_config_dword(pdev, pos + PCI_MSI_ADDRESS_HI, &dd->msi_hi);  in qib_cache_msi_info()
193 			     &dd->msi_data);  in qib_cache_msi_info()
196 int qib_pcie_params(struct qib_devdata *dd, u32 minw, u32 *nent)  in qib_pcie_params()  argument
203 	if (!pci_is_pcie(dd->pcidev)) {  in qib_pcie_params()
204 		qib_dev_err(dd, "Can't find PCI Express capability!\n");  in qib_pcie_params()
206 		dd->lbus_width = 1;  in qib_pcie_params()
207 		dd->lbus_speed = 2500; /* Gen1, 2.5GHz */  in qib_pcie_params()
212 	if (dd->flags & QIB_HAS_INTX)  in qib_pcie_params()
215 	nvec = pci_alloc_irq_vectors(dd->pcidev, 1, maxvec, flags);  in qib_pcie_params()
225 		*nent = !dd->pcidev->msix_enabled ? 0 : nvec;  in qib_pcie_params()
227 	if (dd->pcidev->msi_enabled)  in qib_pcie_params()
228 		qib_cache_msi_info(dd, dd->pcidev->msi_cap);  in qib_pcie_params()
230 	pcie_capability_read_word(dd->pcidev, PCI_EXP_LNKSTA, &linkstat);  in qib_pcie_params()
238 	dd->lbus_width = linkstat;  in qib_pcie_params()
242 		dd->lbus_speed = 2500; /* Gen1, 2.5GHz */  in qib_pcie_params()
245 		dd->lbus_speed = 5000; /* Gen1, 5GHz */  in qib_pcie_params()
248 		dd->lbus_speed = 2500;  in qib_pcie_params()
257 		qib_dev_err(dd,  in qib_pcie_params()
261 	qib_tune_pcie_caps(dd);  in qib_pcie_params()
263 	qib_tune_pcie_coalesce(dd);  in qib_pcie_params()
267 	snprintf(dd->lbus_info, sizeof(dd->lbus_info),  in qib_pcie_params()
268 		 "PCIe,%uMHz,x%u\n", dd->lbus_speed, dd->lbus_width);  in qib_pcie_params()
280 void qib_free_irq(struct qib_devdata *dd)  in qib_free_irq()  argument
282 	pci_free_irq(dd->pcidev, 0, dd);  in qib_free_irq()
283 	pci_free_irq_vectors(dd->pcidev);  in qib_free_irq()
294 int qib_reinit_intr(struct qib_devdata *dd)  in qib_reinit_intr()  argument
301 	if (!dd->msi_lo)  in qib_reinit_intr()
304 	pos = dd->pcidev->msi_cap;  in qib_reinit_intr()
306 		qib_dev_err(dd,  in qib_reinit_intr()
312 	pci_write_config_dword(dd->pcidev, pos + PCI_MSI_ADDRESS_LO,  in qib_reinit_intr()
313 			       dd->msi_lo);  in qib_reinit_intr()
314 	pci_write_config_dword(dd->pcidev, pos + PCI_MSI_ADDRESS_HI,  in qib_reinit_intr()
315 			       dd->msi_hi);  in qib_reinit_intr()
316 	pci_read_config_word(dd->pcidev, pos + PCI_MSI_FLAGS, &control);  in qib_reinit_intr()
319 		pci_write_config_word(dd->pcidev, pos + PCI_MSI_FLAGS,  in qib_reinit_intr()
323 	pci_write_config_word(dd->pcidev, pos +  in qib_reinit_intr()
325 			      dd->msi_data);  in qib_reinit_intr()
328 	qib_free_irq(dd);  in qib_reinit_intr()
330 	if (!ret && (dd->flags & QIB_HAS_INTX))  in qib_reinit_intr()
334 	pci_set_master(dd->pcidev);  in qib_reinit_intr()
343 void qib_pcie_getcmd(struct qib_devdata *dd, u16 *cmd, u8 *iline, u8 *cline)  in qib_pcie_getcmd()  argument
345 	pci_read_config_word(dd->pcidev, PCI_COMMAND, cmd);  in qib_pcie_getcmd()
346 	pci_read_config_byte(dd->pcidev, PCI_INTERRUPT_LINE, iline);  in qib_pcie_getcmd()
347 	pci_read_config_byte(dd->pcidev, PCI_CACHE_LINE_SIZE, cline);  in qib_pcie_getcmd()
350 void qib_pcie_reenable(struct qib_devdata *dd, u16 cmd, u8 iline, u8 cline)  in qib_pcie_reenable()  argument
354 	r = pci_write_config_dword(dd->pcidev, PCI_BASE_ADDRESS_0,  in qib_pcie_reenable()
355 				   dd->pcibar0);  in qib_pcie_reenable()
357 		qib_dev_err(dd, "rewrite of BAR0 failed: %d\n", r);  in qib_pcie_reenable()
358 	r = pci_write_config_dword(dd->pcidev, PCI_BASE_ADDRESS_1,  in qib_pcie_reenable()
359 				   dd->pcibar1);  in qib_pcie_reenable()
361 		qib_dev_err(dd, "rewrite of BAR1 failed: %d\n", r);  in qib_pcie_reenable()
363 	pci_write_config_word(dd->pcidev, PCI_COMMAND, cmd);  in qib_pcie_reenable()
364 	pci_write_config_byte(dd->pcidev, PCI_INTERRUPT_LINE, iline);  in qib_pcie_reenable()
365 	pci_write_config_byte(dd->pcidev, PCI_CACHE_LINE_SIZE, cline);  in qib_pcie_reenable()
366 	r = pci_enable_device(dd->pcidev);  in qib_pcie_reenable()
368 		qib_dev_err(dd,  in qib_pcie_reenable()
383 static void qib_tune_pcie_coalesce(struct qib_devdata *dd)  in qib_tune_pcie_coalesce()  argument
393 	parent = dd->pcidev->bus->self;  in qib_tune_pcie_coalesce()
395 		qib_devinfo(dd->pcidev, "Parent not root\n");  in qib_tune_pcie_coalesce()
450 static void qib_tune_pcie_caps(struct qib_devdata *dd)  in qib_tune_pcie_caps()  argument
457 	parent = dd->pcidev->bus->self;  in qib_tune_pcie_caps()
459 		qib_devinfo(dd->pcidev, "Parent not root\n");  in qib_tune_pcie_caps()
463 	if (!pci_is_pcie(parent) || !pci_is_pcie(dd->pcidev))  in qib_tune_pcie_caps()
469 	ep_mpss = dd->pcidev->pcie_mpss;  in qib_tune_pcie_caps()
470 	ep_mps = ffs(pcie_get_mps(dd->pcidev)) - 8;  in qib_tune_pcie_caps()
487 		pcie_set_mps(dd->pcidev, 128 << ep_mps);  in qib_tune_pcie_caps()
501 	ep_mrrs = pcie_get_readrq(dd->pcidev);  in qib_tune_pcie_caps()
509 		pcie_set_readrq(dd->pcidev, ep_mrrs);  in qib_tune_pcie_caps()
521 	struct qib_devdata *dd = pci_get_drvdata(pdev);  in qib_pci_error_detected()  local
537 		if (dd) {  in qib_pci_error_detected()
539 			dd->flags &= ~QIB_PRESENT;  in qib_pci_error_detected()
540 			qib_disable_after_error(dd);  in qib_pci_error_detected()
558 	struct qib_devdata *dd = pci_get_drvdata(pdev);  in qib_pci_mmio_enabled()  local
561 	if (dd && dd->pport) {  in qib_pci_mmio_enabled()
562 		words = dd->f_portcntr(dd->pport, QIBPORTCNTR_WORDRCV);  in qib_pci_mmio_enabled()
582 	struct qib_devdata *dd = pci_get_drvdata(pdev);  in qib_pci_resume()  local
590 	qib_init(dd, 1); /* same as re-init after reset */  in qib_pci_resume()