58 static int i8xx_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source,  in i8xx_pipe_crc_ctl_reg()  argument
61 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)  in i8xx_pipe_crc_ctl_reg()
62 		*source = INTEL_PIPE_CRC_SOURCE_PIPE;  in i8xx_pipe_crc_ctl_reg()
64 	switch (*source) {  in i8xx_pipe_crc_ctl_reg()
80 				      enum intel_pipe_crc_source *source)  in i9xx_pipe_crc_auto_source()  argument
86 	*source = INTEL_PIPE_CRC_SOURCE_PIPE;  in i9xx_pipe_crc_auto_source()
100 			*source = INTEL_PIPE_CRC_SOURCE_TV;  in i9xx_pipe_crc_auto_source()
107 				*source = INTEL_PIPE_CRC_SOURCE_DP_B;  in i9xx_pipe_crc_auto_source()
110 				*source = INTEL_PIPE_CRC_SOURCE_DP_C;  in i9xx_pipe_crc_auto_source()
113 				*source = INTEL_PIPE_CRC_SOURCE_DP_D;  in i9xx_pipe_crc_auto_source()
130 				enum intel_pipe_crc_source *source,  in vlv_pipe_crc_ctl_reg()  argument
135 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)  in vlv_pipe_crc_ctl_reg()
136 		i9xx_pipe_crc_auto_source(dev_priv, pipe, source);  in vlv_pipe_crc_ctl_reg()
138 	switch (*source) {  in vlv_pipe_crc_ctl_reg()
197 				 enum intel_pipe_crc_source *source,  in i9xx_pipe_crc_ctl_reg()  argument
200 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)  in i9xx_pipe_crc_ctl_reg()
201 		i9xx_pipe_crc_auto_source(dev_priv, pipe, source);  in i9xx_pipe_crc_ctl_reg()
203 	switch (*source) {  in i9xx_pipe_crc_ctl_reg()
217 		 * The DP CRC source doesn't work on g4x.  in i9xx_pipe_crc_ctl_reg()
219 		 * the correct CRC source before the port is enabled,  in i9xx_pipe_crc_ctl_reg()
220 		 * and not touching the CRC source bits again until  in i9xx_pipe_crc_ctl_reg()
255 static int ilk_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source,  in ilk_pipe_crc_ctl_reg()  argument
258 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)  in ilk_pipe_crc_ctl_reg()
259 		*source = INTEL_PIPE_CRC_SOURCE_PIPE;  in ilk_pipe_crc_ctl_reg()
261 	switch (*source) {  in ilk_pipe_crc_ctl_reg()
338 				enum intel_pipe_crc_source *source,  in ivb_pipe_crc_ctl_reg()  argument
341 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)  in ivb_pipe_crc_ctl_reg()
342 		*source = INTEL_PIPE_CRC_SOURCE_PIPE;  in ivb_pipe_crc_ctl_reg()
344 	switch (*source) {  in ivb_pipe_crc_ctl_reg()
366 				enum intel_pipe_crc_source *source,  in skl_pipe_crc_ctl_reg()  argument
369 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)  in skl_pipe_crc_ctl_reg()
370 		*source = INTEL_PIPE_CRC_SOURCE_PIPE;  in skl_pipe_crc_ctl_reg()
372 	switch (*source) {  in skl_pipe_crc_ctl_reg()
409 			       enum intel_pipe_crc_source *source, u32 *val)  in get_new_crc_ctl_reg()  argument
412 		return i8xx_pipe_crc_ctl_reg(source, val);  in get_new_crc_ctl_reg()
414 		return i9xx_pipe_crc_ctl_reg(dev_priv, pipe, source, val);  in get_new_crc_ctl_reg()
416 		return vlv_pipe_crc_ctl_reg(dev_priv, pipe, source, val);  in get_new_crc_ctl_reg()
418 		return ilk_pipe_crc_ctl_reg(source, val);  in get_new_crc_ctl_reg()
420 		return ivb_pipe_crc_ctl_reg(dev_priv, pipe, source, val);  in get_new_crc_ctl_reg()
422 		return skl_pipe_crc_ctl_reg(dev_priv, pipe, source, val);  in get_new_crc_ctl_reg()
451 				 const enum intel_pipe_crc_source source)  in i8xx_crc_source_valid()  argument
453 	switch (source) {  in i8xx_crc_source_valid()
463 				 const enum intel_pipe_crc_source source)  in i9xx_crc_source_valid()  argument
465 	switch (source) {  in i9xx_crc_source_valid()
476 				const enum intel_pipe_crc_source source)  in vlv_crc_source_valid()  argument
478 	switch (source) {  in vlv_crc_source_valid()
491 				const enum intel_pipe_crc_source source)  in ilk_crc_source_valid()  argument
493 	switch (source) {  in ilk_crc_source_valid()
505 				const enum intel_pipe_crc_source source)  in ivb_crc_source_valid()  argument
507 	switch (source) {  in ivb_crc_source_valid()
519 				const enum intel_pipe_crc_source source)  in skl_crc_source_valid()  argument
521 	switch (source) {  in skl_crc_source_valid()
539 			  const enum intel_pipe_crc_source source)  in intel_is_valid_crc_source()  argument
542 		return i8xx_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
544 		return i9xx_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
546 		return vlv_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
548 		return ilk_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
550 		return ivb_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
552 		return skl_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
566 	enum intel_pipe_crc_source source;  in intel_crtc_verify_crc_source()  local
568 	if (display_crc_ctl_parse_source(source_name, &source) < 0) {  in intel_crtc_verify_crc_source()
569 		drm_dbg(&dev_priv->drm, "unknown source %s\n", source_name);  in intel_crtc_verify_crc_source()
573 	if (source == INTEL_PIPE_CRC_SOURCE_AUTO ||  in intel_crtc_verify_crc_source()
574 	    intel_is_valid_crc_source(dev_priv, source) == 0) {  in intel_crtc_verify_crc_source()
588 	enum intel_pipe_crc_source source;  in intel_crtc_set_crc_source()  local
595 	if (display_crc_ctl_parse_source(source_name, &source) < 0) {  in intel_crtc_set_crc_source()
596 		drm_dbg(&dev_priv->drm, "unknown source %s\n", source_name);  in intel_crtc_set_crc_source()
608 	enable = source != INTEL_PIPE_CRC_SOURCE_NONE;  in intel_crtc_set_crc_source()
612 	ret = get_new_crc_ctl_reg(dev_priv, pipe, &source, &val);  in intel_crtc_set_crc_source()
616 	pipe_crc->source = source;  in intel_crtc_set_crc_source()
620 	if (!source) {  in intel_crtc_set_crc_source()
646 	if (get_new_crc_ctl_reg(dev_priv, pipe, &pipe_crc->source, &val) < 0)  in intel_crtc_enable_pipe_crc()