Lines Matching refs:amdgpu_encoder

414 	struct amdgpu_encoder *amdgpu_encoder;  in amdgpu_display_print_display_setup()  local
456 amdgpu_encoder = to_amdgpu_encoder(encoder); in amdgpu_display_print_display_setup()
457 devices = amdgpu_encoder->devices & amdgpu_connector->devices; in amdgpu_display_print_display_setup()
460 DRM_INFO(" CRT1: %s\n", encoder_names[amdgpu_encoder->encoder_id]); in amdgpu_display_print_display_setup()
462 DRM_INFO(" CRT2: %s\n", encoder_names[amdgpu_encoder->encoder_id]); in amdgpu_display_print_display_setup()
464 DRM_INFO(" LCD1: %s\n", encoder_names[amdgpu_encoder->encoder_id]); in amdgpu_display_print_display_setup()
466 DRM_INFO(" DFP1: %s\n", encoder_names[amdgpu_encoder->encoder_id]); in amdgpu_display_print_display_setup()
468 DRM_INFO(" DFP2: %s\n", encoder_names[amdgpu_encoder->encoder_id]); in amdgpu_display_print_display_setup()
470 DRM_INFO(" DFP3: %s\n", encoder_names[amdgpu_encoder->encoder_id]); in amdgpu_display_print_display_setup()
472 DRM_INFO(" DFP4: %s\n", encoder_names[amdgpu_encoder->encoder_id]); in amdgpu_display_print_display_setup()
474 DRM_INFO(" DFP5: %s\n", encoder_names[amdgpu_encoder->encoder_id]); in amdgpu_display_print_display_setup()
476 DRM_INFO(" DFP6: %s\n", encoder_names[amdgpu_encoder->encoder_id]); in amdgpu_display_print_display_setup()
478 DRM_INFO(" TV1: %s\n", encoder_names[amdgpu_encoder->encoder_id]); in amdgpu_display_print_display_setup()
480 DRM_INFO(" CV: %s\n", encoder_names[amdgpu_encoder->encoder_id]); in amdgpu_display_print_display_setup()
1444 struct amdgpu_encoder *amdgpu_encoder; in amdgpu_display_crtc_scaling_mode_fixup() local
1455 amdgpu_encoder = to_amdgpu_encoder(encoder); in amdgpu_display_crtc_scaling_mode_fixup()
1459 if (amdgpu_encoder->rmx_type == RMX_OFF) in amdgpu_display_crtc_scaling_mode_fixup()
1461 else if (mode->hdisplay < amdgpu_encoder->native_mode.hdisplay || in amdgpu_display_crtc_scaling_mode_fixup()
1462 mode->vdisplay < amdgpu_encoder->native_mode.vdisplay) in amdgpu_display_crtc_scaling_mode_fixup()
1463 amdgpu_crtc->rmx_type = amdgpu_encoder->rmx_type; in amdgpu_display_crtc_scaling_mode_fixup()
1468 &amdgpu_encoder->native_mode, in amdgpu_display_crtc_scaling_mode_fixup()
1477 ((amdgpu_encoder->underscan_type == UNDERSCAN_ON) || in amdgpu_display_crtc_scaling_mode_fixup()
1478 ((amdgpu_encoder->underscan_type == UNDERSCAN_AUTO) && in amdgpu_display_crtc_scaling_mode_fixup()
1481 if (amdgpu_encoder->underscan_hborder != 0) in amdgpu_display_crtc_scaling_mode_fixup()
1482 amdgpu_crtc->h_border = amdgpu_encoder->underscan_hborder; in amdgpu_display_crtc_scaling_mode_fixup()
1485 if (amdgpu_encoder->underscan_vborder != 0) in amdgpu_display_crtc_scaling_mode_fixup()
1486 amdgpu_crtc->v_border = amdgpu_encoder->underscan_vborder; in amdgpu_display_crtc_scaling_mode_fixup()