Lines Matching full:on
14 depends on HAS_IOMEM && EDAC_SUPPORT && RAS
38 This turns on debugging information for the entire EDAC subsystem.
44 tristate "Decode MCEs in human-readable form (only on AMD for now)"
45 depends on CPU_SUP_AMD && X86_MCE_AMD
49 occurring on your machine in human-readable form.
57 depends on ACPI_APEI_GHES
80 depends on AMD_NB && EDAC_DECODE_MCE
81 depends on AMD_NODE
84 Support for error detection and correction of DRAM ECC errors on
107 depends on (ARCH_ALPINE || COMPILE_TEST)
114 depends on PCI && X86_32
116 Support for error detection and correction on the AMD 76x
121 depends on PCI && X86_32
123 Support for error detection and correction on the Intel
128 depends on PCI && X86
130 Support for error detection and correction on the Intel
135 depends on PCI && X86_32
136 depends on BROKEN
138 Support for error detection and correction on the Intel
143 depends on PCI && X86_32
145 Support for error detection and correction on the Intel
150 depends on PCI && X86
152 Support for error detection and correction on the Intel
157 depends on PCI && X86
159 Support for error detection and correction on the Intel
164 depends on PCI && X86
166 Support for error detection and correction on the Intel
171 depends on PCI && X86
173 Support for error detection and correction on the Intel
178 depends on PCI && X86
180 Support for error detection and correction on the Intel
185 depends on PCI && X86
192 depends on PCI && X86 && X86_MCE_INTEL
195 i7 Core (Nehalem) Integrated Memory Controller that exists on
201 depends on PCI && X86_32
203 Support for error detection and correction on the Intel
208 depends on PCI && X86_32
210 Support for error detection and correction on the Radisys
215 depends on X86 && PCI
216 depends on BROKEN
223 depends on X86 && PCI
230 depends on X86 && PCI
237 depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG
244 depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG && ACPI
245 depends on ACPI_NFIT || !ACPI_NFIT # if ACPI_NFIT=m, EDAC_SKX can't be y
256 depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG && ACPI
257 depends on ACPI_NFIT || !ACPI_NFIT # if ACPI_NFIT=m, EDAC_I10NM can't be y
268 depends on PCI && X86_64 && X86_MCE_INTEL
271 Support for error detection and correction on the Intel
273 first used on the Apollo Lake platform and Denverton
274 micro-server but may appear on others in the future.
278 depends on PCI && PCI_MMCONFIG && ARCH_HAVE_NMI_SAFE_CMPXCHG
279 depends on X86_64 && X86_MCE_INTEL
281 Support for error detection and correction on the Intel
283 This In-Band ECC is first used on the Elkhart Lake SoC but
284 may appear on others in the future.
288 depends on FSL_SOC && EDAC=y
290 Support for error detection and correction on the Freescale
295 depends on ARCH_LAYERSCAPE || SOC_LS1021A
297 Support for error detection and correction on Freescale memory
298 controllers on Layerscape SoCs.
302 depends on PPC_PASEMI && PCI
304 Support for error detection and correction on PA Semi
309 depends on PPC64
311 Support for error detection and correction on the
318 depends on ARCH_HIGHBANK
320 Support for error detection and correction on the
325 depends on ARCH_HIGHBANK
327 Support for error detection and correction on the
332 depends on CPU_CAVIUM_OCTEON
334 Support for error detection and correction on the primary caches of
339 depends on CAVIUM_OCTEON_SOC
341 Support for error detection and correction on the
346 depends on CAVIUM_OCTEON_SOC
348 Support for error detection and correction on the
353 depends on PCI && CAVIUM_OCTEON_SOC
355 Support for error detection and correction on the
360 depends on ARM64
361 depends on PCI
363 Support for error detection and correction on the
370 depends on EDAC=y && ARCH_INTEL_SOCFPGA
372 Support for error detection and correction on the
378 depends on EDAC_ALTERA=y
380 Support for error detection and correction on the
387 depends on EDAC_ALTERA=y && CACHE_L2X0
389 Support for error detection and correction on the
394 bool "Altera On-Chip RAM ECC"
395 depends on EDAC_ALTERA=y && SRAM && GENERIC_ALLOCATOR
397 Support for error detection and correction on the
398 Altera On-Chip RAM Memory for Altera SoCs.
402 depends on EDAC_ALTERA=y
404 Support for error detection and correction on the
409 depends on EDAC_ALTERA=y && MTD_NAND_DENALI
411 Support for error detection and correction on the
416 depends on EDAC_ALTERA=y && PL330_DMA=y
418 Support for error detection and correction on the
423 depends on EDAC_ALTERA=y && USB_DWC2
425 Support for error detection and correction on the
430 depends on EDAC_ALTERA=y && SPI_CADENCE_QUADSPI
432 Support for error detection and correction on the
437 depends on EDAC_ALTERA=y && MMC_DW
439 Support for error detection and correction on the
444 depends on EDAC=y && SIFIVE_CCACHE
446 Support for error detection and correction on the SiFive SoCs.
450 depends on MACH_MVEBU_V7
452 Support for error correction and detection on the Marvell Aramada XP
457 depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || ARCH_MXC
459 Support for error detection and correction on the Synopsys DDR
464 depends on (ARM64 || COMPILE_TEST)
466 Support for error detection and correction on the
471 depends on ARCH_KEYSTONE || SOC_DRA7XX
473 Support for error detection and correction on the TI SoCs.
477 depends on ARCH_QCOM && QCOM_LLCC
479 Support for error detection and correction on the
491 depends on ARCH_ASPEED
493 Support for error detection and correction on the Aspeed AST BMC SoC.
500 depends on ARM64 && ((MELLANOX_PLATFORM && ACPI) || COMPILE_TEST)
502 Support for error detection and correction on the
507 depends on ARM64
509 Support for error detection and correction on the
514 depends on ARCH_ZYNQMP || COMPILE_TEST
517 Xilinx ZynqMP OCM (On Chip Memory) controller. It can also be
522 depends on (ARCH_NPCM || COMPILE_TEST)
524 Support for error detection and correction on the Nuvoton NPCM DDR
533 depends on ARCH_ZYNQMP || COMPILE_TEST
535 Support for error detection and correction on the Xilinx Versal DDR
544 depends on LOONGARCH && ACPI
546 Support for error detection and correction on the Loongson