Lines Matching +full:system +full:- +full:controller

1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
6 #include <dt-bindings/interrupt-controller/mips-gic.h>
8 #include <dt-bindings/clock/mobileye,eyeq5-clk.h>
11 #address-cells = <2>;
12 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
28 cpu_intc: interrupt-controller {
29 compatible = "mti,cpu-interrupt-controller";
30 interrupt-controller;
31 #address-cells = <0>;
32 #interrupt-cells = <1>;
35 xtal: clock-30000000 {
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <30000000>;
42 compatible = "simple-bus";
43 #address-cells = <2>;
44 #size-cells = <2>;
47 olb_acc: system-controller@d2003000 {
48 compatible = "mobileye,eyeq6h-acc-olb", "syscon";
50 #reset-cells = <1>;
51 #clock-cells = <1>;
53 clock-names = "ref";
56 olb_central: system-controller@d3100000 {
57 compatible = "mobileye,eyeq6h-central-olb", "syscon";
59 #clock-cells = <1>;
61 clock-names = "ref";
67 reg-io-width = <4>;
68 interrupt-parent = <&gic>;
71 clock-names = "uartclk", "apb_pclk";
75 compatible = "pinctrl-single";
77 #pinctrl-cells = <1>;
78 pinctrl-single,register-width = <32>;
79 pinctrl-single,function-mask = <0xffff>;
82 olb_west: system-controller@d3338000 {
83 compatible = "mobileye,eyeq6h-west-olb", "syscon";
85 #reset-cells = <1>;
86 #clock-cells = <1>;
88 clock-names = "ref";
92 compatible = "pinctrl-single";
94 #pinctrl-cells = <1>;
95 pinctrl-single,register-width = <32>;
96 pinctrl-single,function-mask = <0xffff>;
99 olb_east: system-controller@d3358000 {
100 compatible = "mobileye,eyeq6h-east-olb", "syscon";
102 #reset-cells = <1>;
103 #clock-cells = <1>;
105 clock-names = "ref";
108 olb_south: system-controller@d8013000 {
109 compatible = "mobileye,eyeq6h-south-olb", "syscon";
111 #clock-cells = <1>;
113 clock-names = "ref";
117 compatible = "pinctrl-single";
119 #pinctrl-cells = <1>;
120 pinctrl-single,register-width = <32>;
121 pinctrl-single,function-mask = <0xffff>;
124 olb_ddr0: system-controller@e4080000 {
125 compatible = "mobileye,eyeq6h-ddr0-olb", "syscon";
127 #clock-cells = <1>;
129 clock-names = "ref";
132 olb_ddr1: system-controller@e4081000 {
133 compatible = "mobileye,eyeq6h-ddr1-olb", "syscon";
135 #clock-cells = <1>;
137 clock-names = "ref";
140 gic: interrupt-controller@f0920000 {
143 interrupt-controller;
144 #interrupt-cells = <3>;
147 * Declare the interrupt-parent even though the mti,gic
150 * controller & should be probed first.
152 interrupt-parent = <&cpu_intc>;
155 compatible = "mti,gic-timer";
163 #include "eyeq6h-pins.dtsi"