Lines Matching +full:assigned +full:- +full:clock +full:- +full:parents
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/mux/mux.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/phy/phy-ti.h>
12 #include "k3-serdes.h"
15 serdes_refclk: clock-serdes {
16 #clock-cells = <0>;
17 compatible = "fixed-clock";
29 compatible = "mmio-sram";
31 #address-cells = <1>;
32 #size-cells = <1>;
35 atf-sram@0 {
39 tifs-sram@1f0000 {
43 l3cache-sram@200000 {
49 compatible = "simple-bus";
51 #address-cells = <1>;
52 #size-cells = <1>;
56 compatible = "ti,am654-phy-gmii-sel";
58 #phy-cells = <1>;
62 compatible = "ti,j784s4-cpsw9g-phy-gmii-sel";
64 #phy-cells = <1>;
65 ti,qsgmii-main-ports = <7>, <7>;
68 pcie0_ctrl: pcie0-ctrl@4070 {
69 compatible = "ti,j784s4-pcie-ctrl", "syscon";
73 pcie1_ctrl: pcie1-ctrl@4074 {
74 compatible = "ti,j784s4-pcie-ctrl", "syscon";
78 serdes_ln_ctrl: mux-controller@4080 {
79 compatible = "reg-mux";
81 #mux-control-cells = <1>;
82 mux-reg-masks = <0x0 0x3>, <0x4 0x3>, /* SERDES0 lane0/1 select */
90 idle-states = <J784S4_SERDES0_LANE0_PCIE1_LANE0>,
108 usb_serdes_mux: mux-controller@4000 {
109 compatible = "reg-mux";
111 #mux-control-cells = <1>;
112 mux-reg-masks = <0x0 0x8000000>; /* USB0 to SERDES0 lane 3 mux */
115 ehrpwm_tbclk: clock-controller@4140 {
116 compatible = "ti,am654-ehrpwm-tbclk";
118 #clock-cells = <1>;
121 audio_refclk1: clock@82e4 {
122 compatible = "ti,am62-audio-refclk";
125 assigned-clocks = <&k3_clks 157 34>;
126 assigned-clock-parents = <&k3_clks 157 63>;
127 #clock-cells = <0>;
132 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
135 clock-names = "tbclk", "fck";
136 power-domains = <&k3_pds 219 TI_SCI_PD_EXCLUSIVE>;
137 #pwm-cells = <3>;
142 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
145 clock-names = "tbclk", "fck";
146 power-domains = <&k3_pds 220 TI_SCI_PD_EXCLUSIVE>;
147 #pwm-cells = <3>;
152 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
155 clock-names = "tbclk", "fck";
156 power-domains = <&k3_pds 221 TI_SCI_PD_EXCLUSIVE>;
157 #pwm-cells = <3>;
162 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
165 clock-names = "tbclk", "fck";
166 power-domains = <&k3_pds 222 TI_SCI_PD_EXCLUSIVE>;
167 #pwm-cells = <3>;
172 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
175 clock-names = "tbclk", "fck";
176 power-domains = <&k3_pds 223 TI_SCI_PD_EXCLUSIVE>;
177 #pwm-cells = <3>;
182 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
185 clock-names = "tbclk", "fck";
186 power-domains = <&k3_pds 224 TI_SCI_PD_EXCLUSIVE>;
187 #pwm-cells = <3>;
191 gic500: interrupt-controller@1800000 {
192 compatible = "arm,gic-v3";
193 #address-cells = <2>;
194 #size-cells = <2>;
196 #interrupt-cells = <3>;
197 interrupt-controller;
207 gic_its: msi-controller@1820000 {
208 compatible = "arm,gic-v3-its";
210 socionext,synquacer-pre-its = <0x1000000 0x400000>;
211 msi-controller;
212 #msi-cells = <1>;
216 main_gpio_intr: interrupt-controller@a00000 {
217 compatible = "ti,sci-intr";
219 ti,intr-trigger-type = <1>;
220 interrupt-controller;
221 interrupt-parent = <&gic500>;
222 #interrupt-cells = <1>;
224 ti,sci-dev-id = <10>;
225 ti,interrupt-ranges = <8 392 56>;
229 compatible = "ti,j7200-padconf", "pinctrl-single";
232 #pinctrl-cells = <1>;
233 pinctrl-single,register-width = <32>;
234 pinctrl-single,function-mask = <0xffffffff>;
239 compatible = "ti,j7200-padconf", "pinctrl-single";
241 #pinctrl-cells = <1>;
242 pinctrl-single,register-width = <32>;
243 pinctrl-single,function-mask = <0x00000007>;
248 compatible = "ti,j7200-padconf", "pinctrl-single";
250 #pinctrl-cells = <1>;
251 pinctrl-single,register-width = <32>;
252 pinctrl-single,function-mask = <0x0000001f>;
256 compatible = "ti,j721e-sa2ul";
258 power-domains = <&k3_pds 369 TI_SCI_PD_EXCLUSIVE>;
259 #address-cells = <2>;
260 #size-cells = <2>;
265 dma-names = "tx", "rx1", "rx2";
268 compatible = "inside-secure,safexcel-eip76";
275 compatible = "ti,am654-timer";
279 clock-names = "fck";
280 assigned-clocks = <&k3_clks 97 2>;
281 assigned-clock-parents = <&k3_clks 97 3>;
282 power-domains = <&k3_pds 97 TI_SCI_PD_EXCLUSIVE>;
283 ti,timer-pwm;
287 compatible = "ti,am654-timer";
291 clock-names = "fck";
292 assigned-clocks = <&k3_clks 98 2>;
293 assigned-clock-parents = <&k3_clks 98 3>;
294 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
295 ti,timer-pwm;
299 compatible = "ti,am654-timer";
303 clock-names = "fck";
304 assigned-clocks = <&k3_clks 99 2>;
305 assigned-clock-parents = <&k3_clks 99 3>;
306 power-domains = <&k3_pds 99 TI_SCI_PD_EXCLUSIVE>;
307 ti,timer-pwm;
311 compatible = "ti,am654-timer";
315 clock-names = "fck";
316 assigned-clocks = <&k3_clks 100 2>;
317 assigned-clock-parents = <&k3_clks 100 3>;
318 power-domains = <&k3_pds 100 TI_SCI_PD_EXCLUSIVE>;
319 ti,timer-pwm;
323 compatible = "ti,am654-timer";
327 clock-names = "fck";
328 assigned-clocks = <&k3_clks 101 2>;
329 assigned-clock-parents = <&k3_clks 101 3>;
330 power-domains = <&k3_pds 101 TI_SCI_PD_EXCLUSIVE>;
331 ti,timer-pwm;
335 compatible = "ti,am654-timer";
339 clock-names = "fck";
340 assigned-clocks = <&k3_clks 102 2>;
341 assigned-clock-parents = <&k3_clks 102 3>;
342 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
343 ti,timer-pwm;
347 compatible = "ti,am654-timer";
351 clock-names = "fck";
352 assigned-clocks = <&k3_clks 103 2>;
353 assigned-clock-parents = <&k3_clks 103 3>;
354 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
355 ti,timer-pwm;
359 compatible = "ti,am654-timer";
363 clock-names = "fck";
364 assigned-clocks = <&k3_clks 104 2>;
365 assigned-clock-parents = <&k3_clks 104 3>;
366 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
367 ti,timer-pwm;
371 compatible = "ti,am654-timer";
375 clock-names = "fck";
376 assigned-clocks = <&k3_clks 105 2>;
377 assigned-clock-parents = <&k3_clks 105 3>;
378 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
379 ti,timer-pwm;
383 compatible = "ti,am654-timer";
387 clock-names = "fck";
388 assigned-clocks = <&k3_clks 106 2>;
389 assigned-clock-parents = <&k3_clks 106 3>;
390 power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
391 ti,timer-pwm;
395 compatible = "ti,am654-timer";
399 clock-names = "fck";
400 assigned-clocks = <&k3_clks 107 2>;
401 assigned-clock-parents = <&k3_clks 107 3>;
402 power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
403 ti,timer-pwm;
407 compatible = "ti,am654-timer";
411 clock-names = "fck";
412 assigned-clocks = <&k3_clks 108 2>;
413 assigned-clock-parents = <&k3_clks 108 3>;
414 power-domains = <&k3_pds 108 TI_SCI_PD_EXCLUSIVE>;
415 ti,timer-pwm;
419 compatible = "ti,am654-timer";
423 clock-names = "fck";
424 assigned-clocks = <&k3_clks 109 2>;
425 assigned-clock-parents = <&k3_clks 109 3>;
426 power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
427 ti,timer-pwm;
431 compatible = "ti,am654-timer";
435 clock-names = "fck";
436 assigned-clocks = <&k3_clks 110 2>;
437 assigned-clock-parents = <&k3_clks 110 3>;
438 power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
439 ti,timer-pwm;
443 compatible = "ti,am654-timer";
447 clock-names = "fck";
448 assigned-clocks = <&k3_clks 111 2>;
449 assigned-clock-parents = <&k3_clks 111 3>;
450 power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
451 ti,timer-pwm;
455 compatible = "ti,am654-timer";
459 clock-names = "fck";
460 assigned-clocks = <&k3_clks 112 2>;
461 assigned-clock-parents = <&k3_clks 112 3>;
462 power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
463 ti,timer-pwm;
467 compatible = "ti,am654-timer";
471 clock-names = "fck";
472 assigned-clocks = <&k3_clks 113 2>;
473 assigned-clock-parents = <&k3_clks 113 3>;
474 power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
475 ti,timer-pwm;
479 compatible = "ti,am654-timer";
483 clock-names = "fck";
484 assigned-clocks = <&k3_clks 114 2>;
485 assigned-clock-parents = <&k3_clks 114 3>;
486 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
487 ti,timer-pwm;
491 compatible = "ti,am654-timer";
495 clock-names = "fck";
496 assigned-clocks = <&k3_clks 115 2>;
497 assigned-clock-parents = <&k3_clks 115 3>;
498 power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
499 ti,timer-pwm;
503 compatible = "ti,am654-timer";
507 clock-names = "fck";
508 assigned-clocks = <&k3_clks 116 2>;
509 assigned-clock-parents = <&k3_clks 116 3>;
510 power-domains = <&k3_pds 116 TI_SCI_PD_EXCLUSIVE>;
511 ti,timer-pwm;
515 compatible = "ti,j721e-uart", "ti,am654-uart";
519 clock-names = "fclk";
520 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
525 compatible = "ti,j721e-uart", "ti,am654-uart";
529 clock-names = "fclk";
530 power-domains = <&k3_pds 388 TI_SCI_PD_EXCLUSIVE>;
535 compatible = "ti,j721e-uart", "ti,am654-uart";
539 clock-names = "fclk";
540 power-domains = <&k3_pds 389 TI_SCI_PD_EXCLUSIVE>;
545 compatible = "ti,j721e-uart", "ti,am654-uart";
549 clock-names = "fclk";
550 power-domains = <&k3_pds 390 TI_SCI_PD_EXCLUSIVE>;
555 compatible = "ti,j721e-uart", "ti,am654-uart";
559 clock-names = "fclk";
560 power-domains = <&k3_pds 391 TI_SCI_PD_EXCLUSIVE>;
565 compatible = "ti,j721e-uart", "ti,am654-uart";
569 clock-names = "fclk";
570 power-domains = <&k3_pds 392 TI_SCI_PD_EXCLUSIVE>;
575 compatible = "ti,j721e-uart", "ti,am654-uart";
579 clock-names = "fclk";
580 power-domains = <&k3_pds 393 TI_SCI_PD_EXCLUSIVE>;
585 compatible = "ti,j721e-uart", "ti,am654-uart";
589 clock-names = "fclk";
590 power-domains = <&k3_pds 394 TI_SCI_PD_EXCLUSIVE>;
595 compatible = "ti,j721e-uart", "ti,am654-uart";
599 clock-names = "fclk";
600 power-domains = <&k3_pds 395 TI_SCI_PD_EXCLUSIVE>;
605 compatible = "ti,j721e-uart", "ti,am654-uart";
609 clock-names = "fclk";
610 power-domains = <&k3_pds 396 TI_SCI_PD_EXCLUSIVE>;
615 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
617 gpio-controller;
618 #gpio-cells = <2>;
619 interrupt-parent = <&main_gpio_intr>;
621 interrupt-controller;
622 #interrupt-cells = <2>;
624 ti,davinci-gpio-unbanked = <0>;
625 power-domains = <&k3_pds 163 TI_SCI_PD_EXCLUSIVE>;
627 clock-names = "gpio";
632 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
634 gpio-controller;
635 #gpio-cells = <2>;
636 interrupt-parent = <&main_gpio_intr>;
638 interrupt-controller;
639 #interrupt-cells = <2>;
641 ti,davinci-gpio-unbanked = <0>;
642 power-domains = <&k3_pds 164 TI_SCI_PD_EXCLUSIVE>;
644 clock-names = "gpio";
649 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
651 gpio-controller;
652 #gpio-cells = <2>;
653 interrupt-parent = <&main_gpio_intr>;
655 interrupt-controller;
656 #interrupt-cells = <2>;
658 ti,davinci-gpio-unbanked = <0>;
659 power-domains = <&k3_pds 165 TI_SCI_PD_EXCLUSIVE>;
661 clock-names = "gpio";
666 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
668 gpio-controller;
669 #gpio-cells = <2>;
670 interrupt-parent = <&main_gpio_intr>;
672 interrupt-controller;
673 #interrupt-cells = <2>;
675 ti,davinci-gpio-unbanked = <0>;
676 power-domains = <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
678 clock-names = "gpio";
683 bootph-all;
684 compatible = "ti,j721e-usb";
686 dma-coherent;
687 power-domains = <&k3_pds 398 TI_SCI_PD_EXCLUSIVE>;
689 clock-names = "ref", "lpm";
690 assigned-clocks = <&k3_clks 398 21>; /* USB2_REFCLK */
691 assigned-clock-parents = <&k3_clks 398 22>; /* HFOSC0 */
692 #address-cells = <2>;
693 #size-cells = <2>;
699 bootph-all;
704 reg-names = "otg", "xhci", "dev";
708 interrupt-names = "host",
715 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
718 #address-cells = <1>;
719 #size-cells = <0>;
721 clock-names = "fck";
722 power-domains = <&k3_pds 270 TI_SCI_PD_EXCLUSIVE>;
727 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
730 #address-cells = <1>;
731 #size-cells = <0>;
733 clock-names = "fck";
734 power-domains = <&k3_pds 271 TI_SCI_PD_EXCLUSIVE>;
739 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
742 #address-cells = <1>;
743 #size-cells = <0>;
745 clock-names = "fck";
746 power-domains = <&k3_pds 272 TI_SCI_PD_EXCLUSIVE>;
751 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
754 #address-cells = <1>;
755 #size-cells = <0>;
757 clock-names = "fck";
758 power-domains = <&k3_pds 273 TI_SCI_PD_EXCLUSIVE>;
763 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
766 #address-cells = <1>;
767 #size-cells = <0>;
769 clock-names = "fck";
770 power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
775 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
778 #address-cells = <1>;
779 #size-cells = <0>;
781 clock-names = "fck";
782 power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>;
787 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
790 #address-cells = <1>;
791 #size-cells = <0>;
793 clock-names = "fck";
794 power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
799 compatible = "ti,j721e-csi2rx-shim";
802 #address-cells = <2>;
803 #size-cells = <2>;
805 dma-names = "rx0";
806 power-domains = <&k3_pds 72 TI_SCI_PD_EXCLUSIVE>;
809 cdns_csi2rx0: csi-bridge@4504000 {
810 compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
814 clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
817 phy-names = "dphy";
820 #address-cells = <1>;
821 #size-cells = <0>;
852 compatible = "ti,j721e-csi2rx-shim";
855 #address-cells = <2>;
856 #size-cells = <2>;
858 dma-names = "rx0";
859 power-domains = <&k3_pds 73 TI_SCI_PD_EXCLUSIVE>;
862 cdns_csi2rx1: csi-bridge@4514000 {
863 compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
867 clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
870 phy-names = "dphy";
872 #address-cells = <1>;
873 #size-cells = <0>;
904 compatible = "ti,j721e-csi2rx-shim";
907 #address-cells = <2>;
908 #size-cells = <2>;
910 dma-names = "rx0";
911 power-domains = <&k3_pds 74 TI_SCI_PD_EXCLUSIVE>;
914 cdns_csi2rx2: csi-bridge@4524000 {
915 compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
919 clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
922 phy-names = "dphy";
925 #address-cells = <1>;
926 #size-cells = <0>;
957 compatible = "cdns,dphy-rx";
959 #phy-cells = <0>;
960 power-domains = <&k3_pds 212 TI_SCI_PD_EXCLUSIVE>;
965 compatible = "cdns,dphy-rx";
967 #phy-cells = <0>;
968 power-domains = <&k3_pds 213 TI_SCI_PD_EXCLUSIVE>;
973 compatible = "cdns,dphy-rx";
975 #phy-cells = <0>;
976 power-domains = <&k3_pds 214 TI_SCI_PD_EXCLUSIVE>;
980 vpu0: video-codec@4210000 {
981 compatible = "ti,j721s2-wave521c", "cnm,wave521c";
985 power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
988 vpu1: video-codec@4220000 {
989 compatible = "ti,j721s2-wave521c", "cnm,wave521c";
993 power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
997 compatible = "ti,j721e-sdhci-8bit";
1001 power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>;
1003 clock-names = "clk_ahb", "clk_xin";
1004 assigned-clocks = <&k3_clks 140 2>;
1005 assigned-clock-parents = <&k3_clks 140 3>;
1006 bus-width = <8>;
1007 ti,otap-del-sel-legacy = <0x0>;
1008 ti,otap-del-sel-mmc-hs = <0x0>;
1009 ti,otap-del-sel-ddr52 = <0x6>;
1010 ti,otap-del-sel-hs200 = <0x8>;
1011 ti,otap-del-sel-hs400 = <0x5>;
1012 ti,itap-del-sel-legacy = <0x10>;
1013 ti,itap-del-sel-mmc-hs = <0xa>;
1014 ti,strobe-sel = <0x77>;
1015 ti,clkbuf-sel = <0x7>;
1016 ti,trm-icp = <0x8>;
1017 mmc-ddr-1_8v;
1018 mmc-hs200-1_8v;
1019 mmc-hs400-1_8v;
1020 dma-coherent;
1025 compatible = "ti,j721e-sdhci-4bit";
1029 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
1031 clock-names = "clk_ahb", "clk_xin";
1032 assigned-clocks = <&k3_clks 141 4>;
1033 assigned-clock-parents = <&k3_clks 141 5>;
1034 bus-width = <4>;
1035 ti,otap-del-sel-legacy = <0x0>;
1036 ti,otap-del-sel-sd-hs = <0x0>;
1037 ti,otap-del-sel-sdr12 = <0xf>;
1038 ti,otap-del-sel-sdr25 = <0xf>;
1039 ti,otap-del-sel-sdr50 = <0xc>;
1040 ti,otap-del-sel-sdr104 = <0x5>;
1041 ti,otap-del-sel-ddr50 = <0xc>;
1042 ti,itap-del-sel-legacy = <0x0>;
1043 ti,itap-del-sel-sd-hs = <0x0>;
1044 ti,itap-del-sel-sdr12 = <0x0>;
1045 ti,itap-del-sel-sdr25 = <0x0>;
1046 ti,itap-del-sel-ddr50 = <0x2>;
1047 ti,clkbuf-sel = <0x7>;
1048 ti,trm-icp = <0x8>;
1049 dma-coherent;
1054 compatible = "ti,j784s4-pcie-host";
1059 reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
1060 interrupt-names = "link_state";
1063 ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x0>;
1064 max-link-speed = <3>;
1065 num-lanes = <4>;
1066 power-domains = <&k3_pds 332 TI_SCI_PD_EXCLUSIVE>;
1068 clock-names = "fck";
1069 #address-cells = <3>;
1070 #size-cells = <2>;
1071 bus-range = <0x0 0xff>;
1072 vendor-id = <0x104c>;
1073 device-id = <0xb012>;
1074 msi-map = <0x0 &gic_its 0x0 0x10000>;
1075 dma-coherent;
1078 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
1083 compatible = "ti,j784s4-pcie-host";
1088 reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
1089 interrupt-names = "link_state";
1092 ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>;
1093 max-link-speed = <3>;
1094 num-lanes = <4>;
1095 power-domains = <&k3_pds 333 TI_SCI_PD_EXCLUSIVE>;
1097 clock-names = "fck";
1098 #address-cells = <3>;
1099 #size-cells = <2>;
1100 bus-range = <0x0 0xff>;
1101 vendor-id = <0x104c>;
1102 device-id = <0xb012>;
1103 msi-map = <0x0 &gic_its 0x10000 0x10000>;
1104 dma-coherent;
1107 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
1112 compatible = "ti,j784s4-wiz-10g";
1113 #address-cells = <1>;
1114 #size-cells = <1>;
1115 power-domains = <&k3_pds 404 TI_SCI_PD_EXCLUSIVE>;
1117 clock-names = "fck", "core_ref_clk", "ext_ref_clk", "core_ref1_clk";
1118 assigned-clocks = <&k3_clks 404 6>;
1119 assigned-clock-parents = <&k3_clks 404 10>;
1120 num-lanes = <4>;
1121 #reset-cells = <1>;
1122 #clock-cells = <1>;
1127 compatible = "ti,j721e-serdes-10g";
1129 reg-names = "torrent_phy";
1131 reset-names = "torrent_reset";
1134 clock-names = "refclk", "phy_en_refclk";
1135 assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>,
1138 assigned-clock-parents = <&k3_clks 404 6>,
1141 #address-cells = <1>;
1142 #size-cells = <0>;
1143 #clock-cells = <1>;
1149 compatible = "ti,j784s4-wiz-10g";
1150 #address-cells = <1>;
1151 #size-cells = <1>;
1152 power-domains = <&k3_pds 405 TI_SCI_PD_EXCLUSIVE>;
1154 clock-names = "fck", "core_ref_clk", "ext_ref_clk", "core_ref1_clk";
1155 assigned-clocks = <&k3_clks 405 6>;
1156 assigned-clock-parents = <&k3_clks 405 10>;
1157 num-lanes = <4>;
1158 #reset-cells = <1>;
1159 #clock-cells = <1>;
1164 compatible = "ti,j721e-serdes-10g";
1166 reg-names = "torrent_phy";
1168 reset-names = "torrent_reset";
1171 clock-names = "refclk", "phy_en_refclk";
1172 assigned-clocks = <&serdes_wiz1 TI_WIZ_PLL0_REFCLK>,
1175 assigned-clock-parents = <&k3_clks 405 6>,
1178 #address-cells = <1>;
1179 #size-cells = <0>;
1180 #clock-cells = <1>;
1186 compatible = "ti,j784s4-wiz-10g";
1187 #address-cells = <1>;
1188 #size-cells = <1>;
1189 power-domains = <&k3_pds 407 TI_SCI_PD_EXCLUSIVE>;
1191 clock-names = "fck", "core_ref_clk", "ext_ref_clk", "core_ref1_clk";
1192 assigned-clocks = <&k3_clks 407 6>;
1193 assigned-clock-parents = <&k3_clks 407 10>;
1194 num-lanes = <4>;
1195 #reset-cells = <1>;
1196 #clock-cells = <1>;
1206 compatible = "ti,j721e-serdes-10g";
1209 reg-names = "torrent_phy";
1211 reset-names = "torrent_reset";
1214 clock-names = "refclk", "phy_en_refclk";
1215 assigned-clocks = <&serdes_wiz4 TI_WIZ_PLL0_REFCLK>,
1218 assigned-clock-parents = <&k3_clks 407 6>,
1221 #address-cells = <1>;
1222 #size-cells = <0>;
1223 #clock-cells = <1>;
1229 bootph-all;
1230 compatible = "simple-bus";
1231 #address-cells = <2>;
1232 #size-cells = <2>;
1234 ti,sci-dev-id = <280>;
1235 dma-coherent;
1236 dma-ranges;
1238 main_navss_intr: interrupt-controller@310e0000 {
1239 compatible = "ti,sci-intr";
1241 ti,intr-trigger-type = <4>;
1242 interrupt-controller;
1243 interrupt-parent = <&gic500>;
1244 #interrupt-cells = <1>;
1246 ti,sci-dev-id = <283>;
1247 ti,interrupt-ranges = <0 64 64>,
1252 main_udmass_inta: msi-controller@33d00000 {
1253 compatible = "ti,sci-inta";
1255 interrupt-controller;
1256 #interrupt-cells = <0>;
1257 interrupt-parent = <&main_navss_intr>;
1258 msi-controller;
1260 ti,sci-dev-id = <321>;
1261 ti,interrupt-ranges = <0 0 256>;
1262 ti,unmapped-event-sources = <&main_bcdma_csi>;
1266 bootph-all;
1267 compatible = "ti,am654-secure-proxy";
1268 #mbox-cells = <1>;
1269 reg-names = "target_data", "rt", "scfg";
1273 interrupt-names = "rx_011";
1278 compatible = "ti,am654-hwspinlock";
1280 #hwlock-cells = <1>;
1284 compatible = "ti,am654-mailbox";
1286 #mbox-cells = <1>;
1287 ti,mbox-num-users = <4>;
1288 ti,mbox-num-fifos = <16>;
1289 interrupt-parent = <&main_navss_intr>;
1294 compatible = "ti,am654-mailbox";
1296 #mbox-cells = <1>;
1297 ti,mbox-num-users = <4>;
1298 ti,mbox-num-fifos = <16>;
1299 interrupt-parent = <&main_navss_intr>;
1304 compatible = "ti,am654-mailbox";
1306 #mbox-cells = <1>;
1307 ti,mbox-num-users = <4>;
1308 ti,mbox-num-fifos = <16>;
1309 interrupt-parent = <&main_navss_intr>;
1314 compatible = "ti,am654-mailbox";
1316 #mbox-cells = <1>;
1317 ti,mbox-num-users = <4>;
1318 ti,mbox-num-fifos = <16>;
1319 interrupt-parent = <&main_navss_intr>;
1324 compatible = "ti,am654-mailbox";
1326 #mbox-cells = <1>;
1327 ti,mbox-num-users = <4>;
1328 ti,mbox-num-fifos = <16>;
1329 interrupt-parent = <&main_navss_intr>;
1334 compatible = "ti,am654-mailbox";
1336 #mbox-cells = <1>;
1337 ti,mbox-num-users = <4>;
1338 ti,mbox-num-fifos = <16>;
1339 interrupt-parent = <&main_navss_intr>;
1344 compatible = "ti,am654-mailbox";
1346 #mbox-cells = <1>;
1347 ti,mbox-num-users = <4>;
1348 ti,mbox-num-fifos = <16>;
1349 interrupt-parent = <&main_navss_intr>;
1354 compatible = "ti,am654-mailbox";
1356 #mbox-cells = <1>;
1357 ti,mbox-num-users = <4>;
1358 ti,mbox-num-fifos = <16>;
1359 interrupt-parent = <&main_navss_intr>;
1364 compatible = "ti,am654-mailbox";
1366 #mbox-cells = <1>;
1367 ti,mbox-num-users = <4>;
1368 ti,mbox-num-fifos = <16>;
1369 interrupt-parent = <&main_navss_intr>;
1374 compatible = "ti,am654-mailbox";
1376 #mbox-cells = <1>;
1377 ti,mbox-num-users = <4>;
1378 ti,mbox-num-fifos = <16>;
1379 interrupt-parent = <&main_navss_intr>;
1384 compatible = "ti,am654-mailbox";
1386 #mbox-cells = <1>;
1387 ti,mbox-num-users = <4>;
1388 ti,mbox-num-fifos = <16>;
1389 interrupt-parent = <&main_navss_intr>;
1394 compatible = "ti,am654-mailbox";
1396 #mbox-cells = <1>;
1397 ti,mbox-num-users = <4>;
1398 ti,mbox-num-fifos = <16>;
1399 interrupt-parent = <&main_navss_intr>;
1404 compatible = "ti,am654-mailbox";
1406 #mbox-cells = <1>;
1407 ti,mbox-num-users = <4>;
1408 ti,mbox-num-fifos = <16>;
1409 interrupt-parent = <&main_navss_intr>;
1414 compatible = "ti,am654-mailbox";
1416 #mbox-cells = <1>;
1417 ti,mbox-num-users = <4>;
1418 ti,mbox-num-fifos = <16>;
1419 interrupt-parent = <&main_navss_intr>;
1424 compatible = "ti,am654-mailbox";
1426 #mbox-cells = <1>;
1427 ti,mbox-num-users = <4>;
1428 ti,mbox-num-fifos = <16>;
1429 interrupt-parent = <&main_navss_intr>;
1434 compatible = "ti,am654-mailbox";
1436 #mbox-cells = <1>;
1437 ti,mbox-num-users = <4>;
1438 ti,mbox-num-fifos = <16>;
1439 interrupt-parent = <&main_navss_intr>;
1444 compatible = "ti,am654-mailbox";
1446 #mbox-cells = <1>;
1447 ti,mbox-num-users = <4>;
1448 ti,mbox-num-fifos = <16>;
1449 interrupt-parent = <&main_navss_intr>;
1454 compatible = "ti,am654-mailbox";
1456 #mbox-cells = <1>;
1457 ti,mbox-num-users = <4>;
1458 ti,mbox-num-fifos = <16>;
1459 interrupt-parent = <&main_navss_intr>;
1464 compatible = "ti,am654-mailbox";
1466 #mbox-cells = <1>;
1467 ti,mbox-num-users = <4>;
1468 ti,mbox-num-fifos = <16>;
1469 interrupt-parent = <&main_navss_intr>;
1474 compatible = "ti,am654-mailbox";
1476 #mbox-cells = <1>;
1477 ti,mbox-num-users = <4>;
1478 ti,mbox-num-fifos = <16>;
1479 interrupt-parent = <&main_navss_intr>;
1484 compatible = "ti,am654-mailbox";
1486 #mbox-cells = <1>;
1487 ti,mbox-num-users = <4>;
1488 ti,mbox-num-fifos = <16>;
1489 interrupt-parent = <&main_navss_intr>;
1494 compatible = "ti,am654-mailbox";
1496 #mbox-cells = <1>;
1497 ti,mbox-num-users = <4>;
1498 ti,mbox-num-fifos = <16>;
1499 interrupt-parent = <&main_navss_intr>;
1504 compatible = "ti,am654-mailbox";
1506 #mbox-cells = <1>;
1507 ti,mbox-num-users = <4>;
1508 ti,mbox-num-fifos = <16>;
1509 interrupt-parent = <&main_navss_intr>;
1514 compatible = "ti,am654-mailbox";
1516 #mbox-cells = <1>;
1517 ti,mbox-num-users = <4>;
1518 ti,mbox-num-fifos = <16>;
1519 interrupt-parent = <&main_navss_intr>;
1524 compatible = "ti,am654-navss-ringacc";
1530 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
1531 ti,num-rings = <1024>;
1532 ti,sci-rm-range-gp-rings = <0x1>;
1534 ti,sci-dev-id = <315>;
1535 msi-parent = <&main_udmass_inta>;
1538 main_udmap: dma-controller@31150000 {
1539 compatible = "ti,j721e-navss-main-udmap";
1546 reg-names = "gcfg", "rchanrt", "tchanrt",
1548 msi-parent = <&main_udmass_inta>;
1549 #dma-cells = <1>;
1552 ti,sci-dev-id = <319>;
1555 ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
1558 ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
1561 ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
1564 main_bcdma_csi: dma-controller@311a0000 {
1565 compatible = "ti,j721s2-dmss-bcdma-csi";
1570 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
1571 msi-parent = <&main_udmass_inta>;
1572 #dma-cells = <3>;
1574 ti,sci-dev-id = <281>;
1575 ti,sci-rm-range-rchan = <0x21>;
1576 ti,sci-rm-range-tchan = <0x22>;
1580 compatible = "ti,j721e-cpts";
1582 reg-names = "cpts";
1584 clock-names = "cpts";
1585 assigned-clocks = <&k3_clks 62 3>; /* CPTS_RFT_CLK */
1586 assigned-clock-parents = <&k3_clks 62 5>; /* MAIN_0_HSDIV6_CLK */
1587 interrupts-extended = <&main_navss_intr 391>;
1588 interrupt-names = "cpts";
1589 ti,cpts-periodic-outputs = <6>;
1590 ti,cpts-ext-ts-inputs = <8>;
1595 compatible = "ti,j784s4-cpswxg-nuss";
1597 reg-names = "cpsw_nuss";
1599 #address-cells = <2>;
1600 #size-cells = <2>;
1601 dma-coherent;
1603 clock-names = "fck";
1604 power-domains = <&k3_pds 64 TI_SCI_PD_EXCLUSIVE>;
1615 dma-names = "tx0", "tx1", "tx2", "tx3",
1621 ethernet-ports {
1622 #address-cells = <1>;
1623 #size-cells = <0>;
1628 ti,mac-only;
1635 ti,mac-only;
1642 ti,mac-only;
1649 ti,mac-only;
1656 ti,mac-only;
1663 ti,mac-only;
1670 ti,mac-only;
1677 ti,mac-only;
1683 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
1685 #address-cells = <1>;
1686 #size-cells = <0>;
1688 clock-names = "fck";
1694 compatible = "ti,am65-cpts";
1697 clock-names = "cpts";
1698 interrupts-extended = <&gic500 GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1699 interrupt-names = "cpts";
1700 ti,cpts-ext-ts-inputs = <4>;
1701 ti,cpts-periodic-outputs = <2>;
1706 compatible = "ti,j721e-cpsw-nuss";
1708 reg-names = "cpsw_nuss";
1710 #address-cells = <2>;
1711 #size-cells = <2>;
1712 dma-coherent;
1714 clock-names = "fck";
1715 power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
1726 dma-names = "tx0", "tx1", "tx2", "tx3",
1732 ethernet-ports {
1733 #address-cells = <1>;
1734 #size-cells = <0>;
1740 ti,mac-only;
1746 compatible = "ti,cpsw-mdio", "ti,davinci_mdio";
1748 #address-cells = <1>;
1749 #size-cells = <0>;
1751 clock-names = "fck";
1757 compatible = "ti,am65-cpts";
1760 clock-names = "cpts";
1761 interrupts-extended = <&gic500 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1762 interrupt-names = "cpts";
1763 ti,cpts-ext-ts-inputs = <4>;
1764 ti,cpts-periodic-outputs = <2>;
1772 reg-names = "m_can", "message_ram";
1773 power-domains = <&k3_pds 245 TI_SCI_PD_EXCLUSIVE>;
1775 clock-names = "hclk", "cclk";
1778 interrupt-names = "int0", "int1";
1779 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1787 reg-names = "m_can", "message_ram";
1788 power-domains = <&k3_pds 246 TI_SCI_PD_EXCLUSIVE>;
1790 clock-names = "hclk", "cclk";
1793 interrupt-names = "int0", "int1";
1794 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1802 reg-names = "m_can", "message_ram";
1803 power-domains = <&k3_pds 247 TI_SCI_PD_EXCLUSIVE>;
1805 clock-names = "hclk", "cclk";
1808 interrupt-names = "int0", "int1";
1809 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1817 reg-names = "m_can", "message_ram";
1818 power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>;
1820 clock-names = "hclk", "cclk";
1823 interrupt-names = "int0", "int1";
1824 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1832 reg-names = "m_can", "message_ram";
1833 power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
1835 clock-names = "hclk", "cclk";
1838 interrupt-names = "int0", "int1";
1839 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1847 reg-names = "m_can", "message_ram";
1848 power-domains = <&k3_pds 250 TI_SCI_PD_EXCLUSIVE>;
1850 clock-names = "hclk", "cclk";
1853 interrupt-names = "int0", "int1";
1854 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1862 reg-names = "m_can", "message_ram";
1863 power-domains = <&k3_pds 251 TI_SCI_PD_EXCLUSIVE>;
1865 clock-names = "hclk", "cclk";
1868 interrupt-names = "int0", "int1";
1869 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1877 reg-names = "m_can", "message_ram";
1878 power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;
1880 clock-names = "hclk", "cclk";
1883 interrupt-names = "int0", "int1";
1884 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1892 reg-names = "m_can", "message_ram";
1893 power-domains = <&k3_pds 253 TI_SCI_PD_EXCLUSIVE>;
1895 clock-names = "hclk", "cclk";
1898 interrupt-names = "int0", "int1";
1899 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1907 reg-names = "m_can", "message_ram";
1908 power-domains = <&k3_pds 254 TI_SCI_PD_EXCLUSIVE>;
1910 clock-names = "hclk", "cclk";
1913 interrupt-names = "int0", "int1";
1914 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1922 reg-names = "m_can", "message_ram";
1923 power-domains = <&k3_pds 255 TI_SCI_PD_EXCLUSIVE>;
1925 clock-names = "hclk", "cclk";
1928 interrupt-names = "int0", "int1";
1929 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1937 reg-names = "m_can", "message_ram";
1938 power-domains = <&k3_pds 256 TI_SCI_PD_EXCLUSIVE>;
1940 clock-names = "hclk", "cclk";
1943 interrupt-names = "int0", "int1";
1944 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1952 reg-names = "m_can", "message_ram";
1953 power-domains = <&k3_pds 257 TI_SCI_PD_EXCLUSIVE>;
1955 clock-names = "hclk", "cclk";
1958 interrupt-names = "int0", "int1";
1959 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1967 reg-names = "m_can", "message_ram";
1968 power-domains = <&k3_pds 258 TI_SCI_PD_EXCLUSIVE>;
1970 clock-names = "hclk", "cclk";
1973 interrupt-names = "int0", "int1";
1974 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1982 reg-names = "m_can", "message_ram";
1983 power-domains = <&k3_pds 259 TI_SCI_PD_EXCLUSIVE>;
1985 clock-names = "hclk", "cclk";
1988 interrupt-names = "int0", "int1";
1989 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1997 reg-names = "m_can", "message_ram";
1998 power-domains = <&k3_pds 260 TI_SCI_PD_EXCLUSIVE>;
2000 clock-names = "hclk", "cclk";
2003 interrupt-names = "int0", "int1";
2004 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
2012 reg-names = "m_can", "message_ram";
2013 power-domains = <&k3_pds 261 TI_SCI_PD_EXCLUSIVE>;
2015 clock-names = "hclk", "cclk";
2018 interrupt-names = "int0", "int1";
2019 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
2027 reg-names = "m_can", "message_ram";
2028 power-domains = <&k3_pds 262 TI_SCI_PD_EXCLUSIVE>;
2030 clock-names = "hclk", "cclk";
2033 interrupt-names = "int0", "int1";
2034 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
2039 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
2042 #address-cells = <1>;
2043 #size-cells = <0>;
2044 power-domains = <&k3_pds 376 TI_SCI_PD_EXCLUSIVE>;
2050 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
2053 #address-cells = <1>;
2054 #size-cells = <0>;
2055 power-domains = <&k3_pds 377 TI_SCI_PD_EXCLUSIVE>;
2061 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
2064 #address-cells = <1>;
2065 #size-cells = <0>;
2066 power-domains = <&k3_pds 378 TI_SCI_PD_EXCLUSIVE>;
2072 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
2075 #address-cells = <1>;
2076 #size-cells = <0>;
2077 power-domains = <&k3_pds 379 TI_SCI_PD_EXCLUSIVE>;
2083 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
2086 #address-cells = <1>;
2087 #size-cells = <0>;
2088 power-domains = <&k3_pds 380 TI_SCI_PD_EXCLUSIVE>;
2094 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
2097 #address-cells = <1>;
2098 #size-cells = <0>;
2099 power-domains = <&k3_pds 381 TI_SCI_PD_EXCLUSIVE>;
2105 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
2108 #address-cells = <1>;
2109 #size-cells = <0>;
2110 power-domains = <&k3_pds 382 TI_SCI_PD_EXCLUSIVE>;
2116 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
2119 #address-cells = <1>;
2120 #size-cells = <0>;
2121 power-domains = <&k3_pds 383 TI_SCI_PD_EXCLUSIVE>;
2126 ufs_wrapper: ufs-wrapper@4e80000 {
2127 compatible = "ti,j721e-ufs";
2129 power-domains = <&k3_pds 387 TI_SCI_PD_EXCLUSIVE>;
2131 assigned-clocks = <&k3_clks 387 3>;
2132 assigned-clock-parents = <&k3_clks 387 6>;
2134 #address-cells = <2>;
2135 #size-cells = <2>;
2139 compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
2142 freq-table-hz = <250000000 250000000>, <19200000 19200000>,
2145 clock-names = "core_clk", "phy_clk", "ref_clk";
2146 dma-coherent;
2151 compatible = "ti,j721s2-r5fss";
2152 ti,cluster-mode = <1>;
2153 #address-cells = <1>;
2154 #size-cells = <1>;
2157 power-domains = <&k3_pds 336 TI_SCI_PD_EXCLUSIVE>;
2160 compatible = "ti,j721s2-r5f";
2163 reg-names = "atcm", "btcm";
2165 ti,sci-dev-id = <339>;
2166 ti,sci-proc-ids = <0x06 0xff>;
2168 firmware-name = "j784s4-main-r5f0_0-fw";
2169 ti,atcm-enable = <1>;
2170 ti,btcm-enable = <1>;
2175 compatible = "ti,j721s2-r5f";
2178 reg-names = "atcm", "btcm";
2180 ti,sci-dev-id = <340>;
2181 ti,sci-proc-ids = <0x07 0xff>;
2183 firmware-name = "j784s4-main-r5f0_1-fw";
2184 ti,atcm-enable = <1>;
2185 ti,btcm-enable = <1>;
2191 compatible = "ti,j721s2-r5fss";
2192 ti,cluster-mode = <1>;
2193 #address-cells = <1>;
2194 #size-cells = <1>;
2197 power-domains = <&k3_pds 337 TI_SCI_PD_EXCLUSIVE>;
2200 compatible = "ti,j721s2-r5f";
2203 reg-names = "atcm", "btcm";
2205 ti,sci-dev-id = <341>;
2206 ti,sci-proc-ids = <0x08 0xff>;
2208 firmware-name = "j784s4-main-r5f1_0-fw";
2209 ti,atcm-enable = <1>;
2210 ti,btcm-enable = <1>;
2215 compatible = "ti,j721s2-r5f";
2218 reg-names = "atcm", "btcm";
2220 ti,sci-dev-id = <342>;
2221 ti,sci-proc-ids = <0x09 0xff>;
2223 firmware-name = "j784s4-main-r5f1_1-fw";
2224 ti,atcm-enable = <1>;
2225 ti,btcm-enable = <1>;
2231 compatible = "ti,j721s2-r5fss";
2232 ti,cluster-mode = <1>;
2233 #address-cells = <1>;
2234 #size-cells = <1>;
2237 power-domains = <&k3_pds 338 TI_SCI_PD_EXCLUSIVE>;
2240 compatible = "ti,j721s2-r5f";
2243 reg-names = "atcm", "btcm";
2245 ti,sci-dev-id = <343>;
2246 ti,sci-proc-ids = <0x0a 0xff>;
2248 firmware-name = "j784s4-main-r5f2_0-fw";
2249 ti,atcm-enable = <1>;
2250 ti,btcm-enable = <1>;
2255 compatible = "ti,j721s2-r5f";
2258 reg-names = "atcm", "btcm";
2260 ti,sci-dev-id = <344>;
2261 ti,sci-proc-ids = <0x0b 0xff>;
2263 firmware-name = "j784s4-main-r5f2_1-fw";
2264 ti,atcm-enable = <1>;
2265 ti,btcm-enable = <1>;
2271 compatible = "ti,j721s2-c71-dsp";
2274 reg-names = "l2sram", "l1dram";
2276 ti,sci-dev-id = <30>;
2277 ti,sci-proc-ids = <0x30 0xff>;
2279 firmware-name = "j784s4-c71_0-fw";
2284 compatible = "ti,j721s2-c71-dsp";
2287 reg-names = "l2sram", "l1dram";
2289 ti,sci-dev-id = <33>;
2290 ti,sci-proc-ids = <0x31 0xff>;
2292 firmware-name = "j784s4-c71_1-fw";
2297 compatible = "ti,j721s2-c71-dsp";
2300 reg-names = "l2sram", "l1dram";
2302 ti,sci-dev-id = <37>;
2303 ti,sci-proc-ids = <0x32 0xff>;
2305 firmware-name = "j784s4-c71_2-fw";
2310 compatible = "ti,j721e-esm";
2312 ti,esm-pins = <688>, <689>, <690>, <691>, <692>, <693>, <694>,
2314 bootph-pre-ram;
2318 compatible = "ti,j7-rti-wdt";
2321 power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
2322 assigned-clocks = <&k3_clks 348 0>;
2323 assigned-clock-parents = <&k3_clks 348 4>;
2327 compatible = "ti,j7-rti-wdt";
2330 power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>;
2331 assigned-clocks = <&k3_clks 349 0>;
2332 assigned-clock-parents = <&k3_clks 349 4>;
2336 compatible = "ti,j7-rti-wdt";
2339 power-domains = <&k3_pds 350 TI_SCI_PD_EXCLUSIVE>;
2340 assigned-clocks = <&k3_clks 350 0>;
2341 assigned-clock-parents = <&k3_clks 350 4>;
2345 compatible = "ti,j7-rti-wdt";
2348 power-domains = <&k3_pds 351 TI_SCI_PD_EXCLUSIVE>;
2349 assigned-clocks = <&k3_clks 351 0>;
2350 assigned-clock-parents = <&k3_clks 351 4>;
2354 compatible = "ti,j7-rti-wdt";
2357 power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
2358 assigned-clocks = <&k3_clks 352 0>;
2359 assigned-clock-parents = <&k3_clks 352 4>;
2363 compatible = "ti,j7-rti-wdt";
2366 power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
2367 assigned-clocks = <&k3_clks 353 0>;
2368 assigned-clock-parents = <&k3_clks 353 4>;
2372 compatible = "ti,j7-rti-wdt";
2375 power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
2376 assigned-clocks = <&k3_clks 354 0>;
2377 assigned-clock-parents = <&k3_clks 354 4>;
2381 compatible = "ti,j7-rti-wdt";
2384 power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
2385 assigned-clocks = <&k3_clks 355 0>;
2386 assigned-clock-parents = <&k3_clks 355 4>;
2395 compatible = "ti,j7-rti-wdt";
2398 power-domains = <&k3_pds 360 TI_SCI_PD_EXCLUSIVE>;
2399 assigned-clocks = <&k3_clks 360 0>;
2400 assigned-clock-parents = <&k3_clks 360 4>;
2406 compatible = "ti,j7-rti-wdt";
2409 power-domains = <&k3_pds 356 TI_SCI_PD_EXCLUSIVE>;
2410 assigned-clocks = <&k3_clks 356 0>;
2411 assigned-clock-parents = <&k3_clks 356 4>;
2417 compatible = "ti,j7-rti-wdt";
2420 power-domains = <&k3_pds 357 TI_SCI_PD_EXCLUSIVE>;
2421 assigned-clocks = <&k3_clks 357 0>;
2422 assigned-clock-parents = <&k3_clks 357 4>;
2428 compatible = "ti,j7-rti-wdt";
2431 power-domains = <&k3_pds 358 TI_SCI_PD_EXCLUSIVE>;
2432 assigned-clocks = <&k3_clks 358 0>;
2433 assigned-clock-parents = <&k3_clks 358 4>;
2439 compatible = "ti,j7-rti-wdt";
2442 power-domains = <&k3_pds 359 TI_SCI_PD_EXCLUSIVE>;
2443 assigned-clocks = <&k3_clks 359 0>;
2444 assigned-clock-parents = <&k3_clks 359 4>;
2450 compatible = "ti,j7-rti-wdt";
2453 power-domains = <&k3_pds 361 TI_SCI_PD_EXCLUSIVE>;
2454 assigned-clocks = <&k3_clks 361 0>;
2455 assigned-clock-parents = <&k3_clks 361 4>;
2461 compatible = "ti,j7-rti-wdt";
2464 power-domains = <&k3_pds 362 TI_SCI_PD_EXCLUSIVE>;
2465 assigned-clocks = <&k3_clks 362 0>;
2466 assigned-clock-parents = <&k3_clks 362 4>;
2472 compatible = "ti,j7-rti-wdt";
2475 power-domains = <&k3_pds 363 TI_SCI_PD_EXCLUSIVE>;
2476 assigned-clocks = <&k3_clks 363 0>;
2477 assigned-clock-parents = <&k3_clks 363 4>;
2483 compatible = "ti,j7-rti-wdt";
2486 power-domains = <&k3_pds 364 TI_SCI_PD_EXCLUSIVE>;
2487 assigned-clocks = <&k3_clks 364 0>;
2488 assigned-clock-parents = <&k3_clks 364 4>;
2494 compatible = "ti,j7-rti-wdt";
2497 power-domains = <&k3_pds 365 TI_SCI_PD_EXCLUSIVE>;
2498 assigned-clocks = <&k3_clks 365 0>;
2499 assigned-clock-parents = <&k3_clks 366 4>;
2505 compatible = "ti,j7-rti-wdt";
2508 power-domains = <&k3_pds 366 TI_SCI_PD_EXCLUSIVE>;
2509 assigned-clocks = <&k3_clks 366 0>;
2510 assigned-clock-parents = <&k3_clks 366 4>;
2516 compatible = "ti,j721e-mhdp8546";
2519 reg-names = "mhdptx", "j721e-intg";
2521 interrupt-parent = <&gic500>;
2523 power-domains = <&k3_pds 217 TI_SCI_PD_EXCLUSIVE>;
2527 #address-cells = <1>;
2528 #size-cells = <0>;
2529 /* Remote-endpoints are on the boards so
2536 compatible = "ti,j721e-dss";
2554 reg-names = "common_m", "common_s0",
2565 clock-names = "fck", "vp1", "vp2", "vp3", "vp4";
2566 power-domains = <&k3_pds 218 TI_SCI_PD_EXCLUSIVE>;
2571 interrupt-names = "common_m",
2585 compatible = "ti,am33xx-mcasp-audio";
2588 reg-names = "mpu","dat";
2591 interrupt-names = "tx", "rx";
2593 dma-names = "tx", "rx";
2595 clock-names = "fck";
2596 assigned-clocks = <&k3_clks 265 0>;
2597 assigned-clock-parents = <&k3_clks 265 1>;
2598 power-domains = <&k3_pds 265 TI_SCI_PD_EXCLUSIVE>;
2603 compatible = "ti,am33xx-mcasp-audio";
2606 reg-names = "mpu","dat";
2609 interrupt-names = "tx", "rx";
2611 dma-names = "tx", "rx";
2613 clock-names = "fck";
2614 assigned-clocks = <&k3_clks 266 0>;
2615 assigned-clock-parents = <&k3_clks 266 1>;
2616 power-domains = <&k3_pds 266 TI_SCI_PD_EXCLUSIVE>;
2621 compatible = "ti,am33xx-mcasp-audio";
2624 reg-names = "mpu","dat";
2627 interrupt-names = "tx", "rx";
2629 dma-names = "tx", "rx";
2631 clock-names = "fck";
2632 assigned-clocks = <&k3_clks 267 0>;
2633 assigned-clock-parents = <&k3_clks 267 1>;
2634 power-domains = <&k3_pds 267 TI_SCI_PD_EXCLUSIVE>;
2639 compatible = "ti,am33xx-mcasp-audio";
2642 reg-names = "mpu","dat";
2645 interrupt-names = "tx", "rx";
2647 dma-names = "tx", "rx";
2649 clock-names = "fck";
2650 assigned-clocks = <&k3_clks 268 0>;
2651 assigned-clock-parents = <&k3_clks 268 1>;
2652 power-domains = <&k3_pds 268 TI_SCI_PD_EXCLUSIVE>;
2657 compatible = "ti,am33xx-mcasp-audio";
2660 reg-names = "mpu","dat";
2663 interrupt-names = "tx", "rx";
2665 dma-names = "tx", "rx";
2667 clock-names = "fck";
2668 assigned-clocks = <&k3_clks 269 0>;
2669 assigned-clock-parents = <&k3_clks 269 1>;
2670 power-domains = <&k3_pds 269 TI_SCI_PD_EXCLUSIVE>;