Lines Matching +full:shared +full:- +full:dma +full:- +full:pool
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include <dt-bindings/phy/phy.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/leds/common.h>
12 #include "k3-am642.dtsi"
14 #include "k3-serdes.h"
17 compatible = "ti,am642-sk", "ti,am642";
21 stdout-path = &main_uart0;
37 bootph-pre-ram;
43 reserved-memory {
44 #address-cells = <2>;
45 #size-cells = <2>;
49 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
51 no-map;
54 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
55 compatible = "shared-dma-pool";
57 no-map;
60 main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
61 compatible = "shared-dma-pool";
63 no-map;
66 main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
67 compatible = "shared-dma-pool";
69 no-map;
72 main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
73 compatible = "shared-dma-pool";
75 no-map;
78 main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
79 compatible = "shared-dma-pool";
81 no-map;
84 main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
85 compatible = "shared-dma-pool";
87 no-map;
90 main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
91 compatible = "shared-dma-pool";
93 no-map;
96 main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
97 compatible = "shared-dma-pool";
99 no-map;
102 mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 {
103 compatible = "shared-dma-pool";
105 no-map;
108 mcu_m4fss_memory_region: m4f-memory@a4100000 {
109 compatible = "shared-dma-pool";
111 no-map;
114 rtos_ipc_memory_region: ipc-memories@a5000000 {
117 no-map;
121 vusb_main: regulator-0 {
123 bootph-all;
124 compatible = "regulator-fixed";
125 regulator-name = "vusb_main5v0";
126 regulator-min-microvolt = <5000000>;
127 regulator-max-microvolt = <5000000>;
128 regulator-always-on;
129 regulator-boot-on;
132 vcc_3v3_sys: regulator-1 {
134 bootph-all;
135 compatible = "regulator-fixed";
136 regulator-name = "vcc_3v3_sys";
137 regulator-min-microvolt = <3300000>;
138 regulator-max-microvolt = <3300000>;
139 vin-supply = <&vusb_main>;
140 regulator-always-on;
141 regulator-boot-on;
144 vdd_mmc1: regulator-2 {
146 bootph-all;
147 compatible = "regulator-fixed";
148 regulator-name = "vdd_mmc1";
149 regulator-min-microvolt = <3300000>;
150 regulator-max-microvolt = <3300000>;
151 regulator-boot-on;
152 enable-active-high;
153 vin-supply = <&vcc_3v3_sys>;
157 com8_ls_en: regulator-3 {
158 compatible = "regulator-fixed";
159 regulator-name = "com8_ls_en";
160 regulator-min-microvolt = <3300000>;
161 regulator-max-microvolt = <3300000>;
162 regulator-always-on;
163 regulator-boot-on;
164 pinctrl-0 = <&main_com8_ls_en_pins_default>;
165 pinctrl-names = "default";
169 wlan_en: regulator-4 {
171 compatible = "regulator-fixed";
172 regulator-name = "wlan_en";
173 regulator-min-microvolt = <1800000>;
174 regulator-max-microvolt = <1800000>;
175 enable-active-high;
176 pinctrl-0 = <&main_wlan_en_pins_default>;
177 pinctrl-names = "default";
178 vin-supply = <&com8_ls_en>;
182 led-controller {
183 compatible = "gpio-leds";
185 led-0 {
188 function-enumerator = <1>;
190 default-state = "off";
193 led-1 {
196 function-enumerator = <2>;
198 default-state = "off";
201 led-2 {
204 function-enumerator = <3>;
206 default-state = "off";
209 led-3 {
212 function-enumerator = <4>;
214 default-state = "off";
217 led-4 {
220 function-enumerator = <5>;
222 default-state = "off";
225 led-5 {
228 function-enumerator = <6>;
230 default-state = "off";
233 led-6 {
236 function-enumerator = <7>;
238 default-state = "off";
241 led-7 {
244 function-enumerator = <8>;
245 linux,default-trigger = "heartbeat";
252 main_mmc1_pins_default: main-mmc1-default-pins {
253 bootph-all;
254 pinctrl-single,pins = <
267 main_uart0_pins_default: main-uart0-default-pins {
268 bootph-all;
269 pinctrl-single,pins = <
277 main_uart1_pins_default: main-uart1-default-pins {
278 bootph-pre-ram;
279 pinctrl-single,pins = <
287 main_usb0_pins_default: main-usb0-default-pins {
288 bootph-all;
289 pinctrl-single,pins = <
294 main_i2c0_pins_default: main-i2c0-default-pins {
295 bootph-all;
296 pinctrl-single,pins = <
302 main_i2c1_pins_default: main-i2c1-default-pins {
303 bootph-all;
304 pinctrl-single,pins = <
310 mdio1_pins_default: mdio1-default-pins {
311 pinctrl-single,pins = <
317 rgmii1_pins_default: rgmii1-default-pins {
318 pinctrl-single,pins = <
334 rgmii2_pins_default: rgmii2-default-pins {
335 pinctrl-single,pins = <
351 ospi0_pins_default: ospi0-default-pins {
352 pinctrl-single,pins = <
367 main_ecap0_pins_default: main-ecap0-default-pins {
368 pinctrl-single,pins = <
373 main_eqep0_pins_default: main-eqep0-default-pins {
374 pinctrl-single,pins = <
382 main_wlan_en_pins_default: main-wlan-en-default-pins {
383 pinctrl-single,pins = <
388 main_com8_ls_en_pins_default: main-com8-ls-en-default-pins {
389 pinctrl-single,pins = <
394 main_wlan_pins_default: main-wlan-default-pins {
395 pinctrl-single,pins = <
402 bootph-all;
404 pinctrl-names = "default";
405 pinctrl-0 = <&main_uart0_pins_default>;
410 bootph-pre-ram;
412 pinctrl-names = "default";
413 pinctrl-0 = <&main_uart1_pins_default>;
417 bootph-all;
419 pinctrl-names = "default";
420 pinctrl-0 = <&main_i2c0_pins_default>;
421 clock-frequency = <400000>;
430 bootph-all;
432 pinctrl-names = "default";
433 pinctrl-0 = <&main_i2c1_pins_default>;
434 clock-frequency = <400000>;
437 bootph-all;
440 gpio-controller;
441 #gpio-cells = <2>;
442 gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
451 gpio-controller;
452 #gpio-cells = <2>;
453 gpio-line-names = "LED1","LED2","LED3","LED4","LED5","LED6","LED7","LED8";
480 vmmc-supply = <&wlan_en>;
481 bus-width = <4>;
482 non-removable;
483 cap-power-off-card;
484 keep-power-in-suspend;
485 ti,driver-strength-ohm = <50>;
487 #address-cells = <1>;
488 #size-cells = <0>;
492 pinctrl-0 = <&main_wlan_pins_default>;
493 pinctrl-names = "default";
494 interrupt-parent = <&main_gpio0>;
501 bootph-all;
503 vmmc-supply = <&vdd_mmc1>;
504 pinctrl-names = "default";
505 pinctrl-0 = <&main_mmc1_pins_default>;
506 disable-wp;
510 bootph-all;
511 idle-states = <AM64_SERDES0_LANE0_USB>;
515 bootph-all;
519 bootph-all;
523 bootph-all;
525 bootph-all;
527 cdns,num-lanes = <1>;
528 #phy-cells = <0>;
529 cdns,phy-type = <PHY_TYPE_USB3>;
535 bootph-all;
536 ti,vbus-divider;
540 bootph-all;
542 maximum-speed = "super-speed";
543 pinctrl-names = "default";
544 pinctrl-0 = <&main_usb0_pins_default>;
546 phy-names = "cdns3,usb3-phy";
550 pinctrl-names = "default";
551 pinctrl-0 = <&rgmii1_pins_default>, <&rgmii2_pins_default>;
556 phy-mode = "rgmii-rxid";
557 phy-handle = <&cpsw3g_phy0>;
562 phy-mode = "rgmii-rxid";
563 phy-handle = <&cpsw3g_phy1>;
569 pinctrl-names = "default";
570 pinctrl-0 = <&mdio1_pins_default>;
572 cpsw3g_phy0: ethernet-phy@0 {
574 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
575 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
578 cpsw3g_phy1: ethernet-phy@1 {
580 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
581 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
587 pinctrl-names = "default";
588 pinctrl-0 = <&ospi0_pins_default>;
591 compatible = "jedec,spi-nor";
593 spi-tx-bus-width = <8>;
594 spi-rx-bus-width = <8>;
595 spi-max-frequency = <25000000>;
596 cdns,tshsl-ns = <60>;
597 cdns,tsd2d-ns = <60>;
598 cdns,tchsh-ns = <60>;
599 cdns,tslch-ns = <60>;
600 cdns,read-delay = <4>;
603 compatible = "fixed-partitions";
604 #address-cells = <1>;
605 #size-cells = <1>;
618 label = "ospi.u-boot";
648 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
649 ti,mbox-rx = <0 0 2>;
650 ti,mbox-tx = <1 0 2>;
653 mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
654 ti,mbox-rx = <2 0 2>;
655 ti,mbox-tx = <3 0 2>;
662 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
663 ti,mbox-rx = <0 0 2>;
664 ti,mbox-tx = <1 0 2>;
667 mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
668 ti,mbox-rx = <2 0 2>;
669 ti,mbox-tx = <3 0 2>;
676 mbox_m4_0: mbox-m4-0 {
677 ti,mbox-rx = <0 0 2>;
678 ti,mbox-tx = <1 0 2>;
684 memory-region = <&main_r5fss0_core0_dma_memory_region>,
690 memory-region = <&main_r5fss0_core1_dma_memory_region>,
696 memory-region = <&main_r5fss1_core0_dma_memory_region>,
702 memory-region = <&main_r5fss1_core1_dma_memory_region>,
708 memory-region = <&mcu_m4fss_dma_memory_region>,
716 pinctrl-names = "default";
717 pinctrl-0 = <&main_ecap0_pins_default>;
723 pinctrl-names = "default";
724 pinctrl-0 = <&main_eqep0_pins_default>;