Lines Matching +full:full +full:- +full:pwr +full:- +full:cycle
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the R-Car V4M Gray Hawk Single board
11 * Because R-Car V4M has only 1 SSI, it cannot handle both Playback/Capture
28 /dts-v1/;
30 #include <dt-bindings/gpio/gpio.h>
31 #include <dt-bindings/input/input.h>
32 #include <dt-bindings/leds/common.h>
33 #include <dt-bindings/media/video-interfaces.h>
39 compatible = "renesas,gray-hawk-single", "renesas,r8a779h0";
51 can_transceiver0: can-phy0 {
53 #phy-cells = <0>;
54 enable-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
55 max-bitrate = <5000000>;
60 stdout-path = "serial0:921600n8";
63 sn65dsi86_refclk: clk-x6 {
64 compatible = "fixed-clock";
65 #clock-cells = <0>;
66 clock-frequency = <38400000>;
70 compatible = "gpio-keys";
72 pinctrl-0 = <&keys_pins>;
73 pinctrl-names = "default";
75 key-1 {
79 wakeup-source;
80 debounce-interval = <20>;
83 key-2 {
87 wakeup-source;
88 debounce-interval = <20>;
91 key-3 {
95 wakeup-source;
96 debounce-interval = <20>;
101 compatible = "gpio-leds";
103 led-1 {
107 function-enumerator = <1>;
110 led-2 {
114 function-enumerator = <2>;
117 led-3 {
121 function-enumerator = <3>;
136 pcie_clk: clk-9fgv0841-pci {
137 compatible = "fixed-clock";
138 clock-frequency = <100000000>;
139 #clock-cells = <0>;
142 mini-dp-con {
143 compatible = "dp-connector";
149 remote-endpoint = <&sn65dsi86_out0>;
154 reg_1p2v: regulator-1p2v {
155 compatible = "regulator-fixed";
156 regulator-name = "fixed-1.2V";
157 regulator-min-microvolt = <1200000>;
158 regulator-max-microvolt = <1200000>;
159 regulator-boot-on;
160 regulator-always-on;
163 reg_1p8v: regulator-1p8v {
164 compatible = "regulator-fixed";
165 regulator-name = "fixed-1.8V";
166 regulator-min-microvolt = <1800000>;
167 regulator-max-microvolt = <1800000>;
168 regulator-boot-on;
169 regulator-always-on;
172 reg_3p3v: regulator-3p3v {
173 compatible = "regulator-fixed";
174 regulator-name = "fixed-3.3V";
175 regulator-min-microvolt = <3300000>;
176 regulator-max-microvolt = <3300000>;
177 regulator-boot-on;
178 regulator-always-on;
181 sound_mux: sound-mux {
182 compatible = "simple-audio-mux";
183 mux-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
184 state-labels = "Playback", "Capture";
188 compatible = "audio-graph-card2";
189 label = "rcar-sound";
190 aux-devs = <&sound_mux>; // for GP0_01
197 clock-frequency = <24576000>;
201 pinctrl-0 = <&avb0_pins>;
202 pinctrl-names = "default";
203 phy-handle = <&phy0>;
204 tx-internal-delay-ps = <2000>;
207 phy0: ethernet-phy@0 {
208 compatible = "ethernet-phy-id0022.1622",
209 "ethernet-phy-ieee802.3-c22";
210 rxc-skew-ps = <1500>;
212 interrupts-extended = <&gpio7 5 IRQ_TYPE_LEVEL_LOW>;
213 reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
218 clock-frequency = <40000000>;
222 pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>;
223 pinctrl-names = "default";
244 remote-endpoint = <&sn65dsi86_in0>;
245 data-lanes = <1 2 3 4>;
259 #address-cells = <1>;
260 #size-cells = <0>;
266 bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
267 clock-lanes = <0>;
268 data-lanes = <1 2 3 4>;
269 remote-endpoint = <&max96724_out0>;
279 #address-cells = <1>;
280 #size-cells = <0>;
286 bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
287 clock-lanes = <0>;
288 data-lanes = <1 2 3 4>;
289 remote-endpoint = <&max96724_out1>;
296 clock-frequency = <16666666>;
300 clock-frequency = <32768>;
304 audio-power-hog {
305 gpio-hog;
307 output-high;
308 line-name = "Audio-Power";
313 pinctrl-0 = <&hscif0_pins>;
314 pinctrl-names = "default";
316 uart-has-rtscts;
321 pinctrl-0 = <&hscif2_pins>;
322 pinctrl-names = "default";
324 uart-has-rtscts;
329 pinctrl-0 = <&i2c0_pins>;
330 pinctrl-names = "default";
333 clock-frequency = <400000>;
338 interrupts-extended = <&gpio0 0 IRQ_TYPE_LEVEL_LOW>;
339 gpio-controller;
340 #gpio-cells = <2>;
341 interrupt-controller;
342 #interrupt-cells = <2>;
348 gpio-controller;
349 #gpio-cells = <2>;
355 gpio-controller;
356 #gpio-cells = <2>;
361 label = "cpu-board";
368 label = "breakout-board";
375 label = "csi-dsi-sub-board-id";
382 label = "ethernet-sub-board-id";
389 pinctrl-0 = <&i2c1_pins>;
390 pinctrl-names = "default";
393 clock-frequency = <400000>;
396 pinctrl-0 = <&irq0_pins>;
397 pinctrl-names = "default";
403 clock-names = "refclk";
405 interrupts-extended = <&intc_ex 0 IRQ_TYPE_LEVEL_HIGH>;
407 enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
409 vccio-supply = <®_1p8v>;
410 vpll-supply = <®_1p8v>;
411 vcca-supply = <®_1p2v>;
412 vcc-supply = <®_1p2v>;
415 #address-cells = <1>;
416 #size-cells = <0>;
422 remote-endpoint = <&dsi0_out>;
430 remote-endpoint = <&mini_dp_con_in>;
436 gmsl0: gmsl-deserializer@4e {
439 enable-gpios = <&io_expander_b 0 GPIO_ACTIVE_HIGH>;
442 #address-cells = <1>;
443 #size-cells = <0>;
448 bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
449 clock-lanes = <0>;
450 data-lanes = <1 2 3 4>;
451 remote-endpoint = <&csi40_in>;
457 gmsl1: gmsl-deserializer@4f {
460 enable-gpios = <&io_expander_c 0 GPIO_ACTIVE_HIGH>;
463 #address-cells = <1>;
464 #size-cells = <0>;
469 bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
470 clock-lanes = <0>;
471 data-lanes = <1 2 3 4>;
472 remote-endpoint = <&csi41_in>;
480 pinctrl-0 = <&i2c3_pins>;
481 pinctrl-names = "default";
484 clock-frequency = <400000>;
487 compatible = "asahi-kasei,ak4619";
491 clock-names = "mclk";
493 #sound-dai-cells = <0>;
496 remote-endpoint = <&rsnd_endpoint>;
511 pinctrl-0 = <&mmc_pins>;
512 pinctrl-1 = <&mmc_pins>;
513 pinctrl-names = "default", "state_uhs";
515 vmmc-supply = <®_3p3v>;
516 vqmmc-supply = <®_1p8v>;
517 mmc-hs200-1_8v;
518 mmc-hs400-1_8v;
519 bus-width = <8>;
520 no-sd;
521 no-sdio;
522 non-removable;
523 full-pwr-cycle-in-suspend;
528 compatible = "gpio-gate-clock";
530 enable-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
531 /delete-property/ clock-frequency;
535 reset-gpios = <&io_expander_a 0 GPIO_ACTIVE_LOW>;
540 pinctrl-0 = <&scif_clk_pins>, <&scif_clk2_pins>;
541 pinctrl-names = "default";
552 drive-strength = <21>;
557 drive-strength = <21>;
561 can_clk_pins: can-clk {
608 bias-pull-up;
614 power-source = <1800>;
622 scif_clk_pins: scif-clk {
627 scif_clk2_pins: scif-clk2 {
644 pinctrl-0 = <&sound_clk_pins>, <&sound_pins>;
645 pinctrl-names = "default";
650 clock-frequency = <12288000>;
655 remote-endpoint = <&ak4619_endpoint>;
656 bitclock-master;
657 frame-master;
668 pinctrl-0 = <&qspi0_pins>;
669 pinctrl-names = "default";
674 compatible = "spansion,s25fs512s", "jedec,spi-nor";
676 spi-max-frequency = <40000000>;
677 spi-rx-bus-width = <4>;
680 compatible = "fixed-partitions";
681 #address-cells = <1>;
682 #size-cells = <1>;
686 read-only;
696 timeout-sec = <60>;
701 clock-frequency = <24000000>;
705 clock-frequency = <24000000>;