Lines Matching full:cpg
8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
82 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
93 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
150 clocks = <&cpg CPG_MOD 402>;
152 resets = <&cpg 402>;
166 clocks = <&cpg CPG_MOD 912>;
168 resets = <&cpg 912>;
181 clocks = <&cpg CPG_MOD 911>;
183 resets = <&cpg 911>;
196 clocks = <&cpg CPG_MOD 910>;
198 resets = <&cpg 910>;
211 clocks = <&cpg CPG_MOD 909>;
213 resets = <&cpg 909>;
226 clocks = <&cpg CPG_MOD 908>;
228 resets = <&cpg 908>;
241 clocks = <&cpg CPG_MOD 907>;
243 resets = <&cpg 907>;
256 clocks = <&cpg CPG_MOD 906>;
258 resets = <&cpg 906>;
272 clocks = <&cpg CPG_MOD 303>;
275 resets = <&cpg 303>;
291 clocks = <&cpg CPG_MOD 302>;
294 resets = <&cpg 302>;
310 clocks = <&cpg CPG_MOD 301>;
313 resets = <&cpg 301>;
329 clocks = <&cpg CPG_MOD 300>;
332 resets = <&cpg 300>;
336 cpg: clock-controller@e6150000 { label
337 compatible = "renesas,r8a774c0-cpg-mssr";
363 clocks = <&cpg CPG_MOD 522>;
365 resets = <&cpg 522>;
380 clocks = <&cpg CPG_MOD 407>;
382 resets = <&cpg 407>;
392 clocks = <&cpg CPG_MOD 125>;
395 resets = <&cpg 125>;
407 clocks = <&cpg CPG_MOD 124>;
410 resets = <&cpg 124>;
422 clocks = <&cpg CPG_MOD 123>;
425 resets = <&cpg 123>;
436 clocks = <&cpg CPG_MOD 122>;
439 resets = <&cpg 122>;
450 clocks = <&cpg CPG_MOD 121>;
453 resets = <&cpg 121>;
464 clocks = <&cpg CPG_MOD 931>;
466 resets = <&cpg 931>;
481 clocks = <&cpg CPG_MOD 930>;
483 resets = <&cpg 930>;
498 clocks = <&cpg CPG_MOD 929>;
500 resets = <&cpg 929>;
515 clocks = <&cpg CPG_MOD 928>;
517 resets = <&cpg 928>;
531 clocks = <&cpg CPG_MOD 927>;
533 resets = <&cpg 927>;
547 clocks = <&cpg CPG_MOD 919>;
549 resets = <&cpg 919>;
563 clocks = <&cpg CPG_MOD 918>;
565 resets = <&cpg 918>;
579 clocks = <&cpg CPG_MOD 1003>;
581 resets = <&cpg 1003>;
594 clocks = <&cpg CPG_MOD 926>;
596 resets = <&cpg 926>;
608 clocks = <&cpg CPG_MOD 520>,
609 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
616 resets = <&cpg 520>;
626 clocks = <&cpg CPG_MOD 519>,
627 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
634 resets = <&cpg 519>;
644 clocks = <&cpg CPG_MOD 518>,
645 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
652 resets = <&cpg 518>;
662 clocks = <&cpg CPG_MOD 517>,
663 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
669 resets = <&cpg 517>;
679 clocks = <&cpg CPG_MOD 516>,
680 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
686 resets = <&cpg 516>;
695 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
703 resets = <&cpg 704>, <&cpg 703>;
714 clocks = <&cpg CPG_MOD 330>;
716 resets = <&cpg 330>;
728 clocks = <&cpg CPG_MOD 331>;
730 resets = <&cpg 331>;
761 clocks = <&cpg CPG_MOD 219>;
764 resets = <&cpg 219>;
803 clocks = <&cpg CPG_MOD 218>;
806 resets = <&cpg 218>;
845 clocks = <&cpg CPG_MOD 217>;
848 resets = <&cpg 217>;
970 clocks = <&cpg CPG_MOD 812>;
973 resets = <&cpg 812>;
987 clocks = <&cpg CPG_MOD 916>,
988 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
991 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
994 resets = <&cpg 916>;
1003 clocks = <&cpg CPG_MOD 915>,
1004 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
1007 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
1010 resets = <&cpg 915>;
1021 clocks = <&cpg CPG_MOD 914>,
1022 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
1025 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
1028 resets = <&cpg 914>;
1043 clocks = <&cpg CPG_MOD 523>;
1045 resets = <&cpg 523>;
1053 clocks = <&cpg CPG_MOD 523>;
1055 resets = <&cpg 523>;
1063 clocks = <&cpg CPG_MOD 523>;
1065 resets = <&cpg 523>;
1073 clocks = <&cpg CPG_MOD 523>;
1075 resets = <&cpg 523>;
1083 clocks = <&cpg CPG_MOD 523>;
1085 resets = <&cpg 523>;
1093 clocks = <&cpg CPG_MOD 523>;
1095 resets = <&cpg 523>;
1103 clocks = <&cpg CPG_MOD 523>;
1105 resets = <&cpg 523>;
1115 clocks = <&cpg CPG_MOD 207>,
1116 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1123 resets = <&cpg 207>;
1132 clocks = <&cpg CPG_MOD 206>,
1133 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1140 resets = <&cpg 206>;
1149 clocks = <&cpg CPG_MOD 310>,
1150 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1157 resets = <&cpg 310>;
1166 clocks = <&cpg CPG_MOD 204>,
1167 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1173 resets = <&cpg 204>;
1182 clocks = <&cpg CPG_MOD 203>,
1183 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1189 resets = <&cpg 203>;
1198 clocks = <&cpg CPG_MOD 202>,
1199 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1205 resets = <&cpg 202>;
1214 clocks = <&cpg CPG_MOD 211>;
1219 resets = <&cpg 211>;
1230 clocks = <&cpg CPG_MOD 210>;
1234 resets = <&cpg 210>;
1245 clocks = <&cpg CPG_MOD 209>;
1249 resets = <&cpg 209>;
1260 clocks = <&cpg CPG_MOD 208>;
1264 resets = <&cpg 208>;
1274 clocks = <&cpg CPG_MOD 807>;
1276 resets = <&cpg 807>;
1302 clocks = <&cpg CPG_MOD 806>;
1304 resets = <&cpg 806>;
1348 clocks = <&cpg CPG_MOD 1005>,
1349 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1350 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1351 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1352 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1353 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1354 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1355 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1356 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1357 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1358 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1359 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1360 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1361 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1364 <&cpg CPG_MOD 922>;
1377 resets = <&cpg 1005>,
1378 <&cpg 1006>, <&cpg 1007>,
1379 <&cpg 1008>, <&cpg 1009>,
1380 <&cpg 1010>, <&cpg 1011>,
1381 <&cpg 1012>, <&cpg 1013>,
1382 <&cpg 1014>, <&cpg 1015>;
1559 clocks = <&cpg CPG_MOD 502>;
1562 resets = <&cpg 502>;
1580 clocks = <&cpg CPG_MOD 328>;
1582 resets = <&cpg 328>;
1591 clocks = <&cpg CPG_MOD 328>;
1593 resets = <&cpg 328>;
1601 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1605 resets = <&cpg 703>, <&cpg 704>;
1613 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1618 resets = <&cpg 703>, <&cpg 704>;
1627 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1629 resets = <&cpg 703>, <&cpg 704>;
1639 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774C0_CLK_SD0H>;
1643 resets = <&cpg 314>;
1653 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774C0_CLK_SD1H>;
1657 resets = <&cpg 313>;
1667 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774C0_CLK_SD3H>;
1671 resets = <&cpg 311>;
1684 clocks = <&cpg CPG_MOD 917>;
1686 resets = <&cpg 917>;
1703 clocks = <&cpg CPG_MOD 408>;
1706 resets = <&cpg 408>;
1729 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1732 resets = <&cpg 319>;
1750 clocks = <&cpg CPG_MOD 319>;
1752 resets = <&cpg 319>;
1761 clocks = <&cpg CPG_MOD 626>;
1763 resets = <&cpg 626>;
1771 clocks = <&cpg CPG_MOD 623>;
1773 resets = <&cpg 623>;
1781 clocks = <&cpg CPG_MOD 622>;
1783 resets = <&cpg 622>;
1791 clocks = <&cpg CPG_MOD 631>;
1793 resets = <&cpg 631>;
1800 clocks = <&cpg CPG_MOD 607>;
1802 resets = <&cpg 607>;
1809 clocks = <&cpg CPG_MOD 603>;
1811 resets = <&cpg 603>;
1818 clocks = <&cpg CPG_MOD 602>;
1820 resets = <&cpg 602>;
1827 clocks = <&cpg CPG_MOD 611>;
1829 resets = <&cpg 611>;
1837 clocks = <&cpg CPG_MOD 716>;
1839 resets = <&cpg 716>;
1873 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1875 resets = <&cpg 724>;
1908 clocks = <&cpg CPG_MOD 727>;
1910 resets = <&cpg 727>;
1935 clocks = <&cpg CPG_MOD 727>;
1937 resets = <&cpg 726>;