Lines Matching full:gcc
10 #include <dt-bindings/clock/qcom,ipq5424-gcc.h>
11 #include <dt-bindings/reset/qcom,ipq5424-gcc.h>
158 clocks = <&gcc GCC_PRNG_AHB_CLK>;
187 gcc: clock-controller@1800000 { label
188 compatible = "qcom,ipq5424-gcc";
217 clocks = <&gcc GCC_QUPV3_AHB_MST_CLK>,
218 <&gcc GCC_QUPV3_AHB_SLV_CLK>;
226 clocks = <&gcc GCC_QUPV3_UART1_CLK>;
234 clocks = <&gcc GCC_QUPV3_SPI0_CLK>;
245 clocks = <&gcc GCC_QUPV3_SPI1_CLK>;
263 clocks = <&gcc GCC_SDCC1_AHB_CLK>,
264 <&gcc GCC_SDCC1_APPS_CLK>,
296 clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
300 resets = <&gcc GCC_QUSB2_1_PHY_BCR>;
311 clocks = <&gcc GCC_USB1_MASTER_CLK>,
312 <&gcc GCC_USB1_SLEEP_CLK>,
313 <&gcc GCC_USB1_MOCK_UTMI_CLK>,
314 <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
315 <&gcc GCC_CNOC_USB_CLK>;
323 assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>,
324 <&gcc GCC_USB1_MOCK_UTMI_CLK>;
337 resets = <&gcc GCC_USB1_BCR>;
344 clocks = <&gcc GCC_USB1_MOCK_UTMI_CLK>;
362 clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
366 resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
375 clocks = <&gcc GCC_USB0_AUX_CLK>,
377 <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
378 <&gcc GCC_USB0_PIPE_CLK>;
384 resets = <&gcc GCC_USB0_PHY_BCR>,
385 <&gcc GCC_USB3PHY_0_PHY_BCR>;
403 clocks = <&gcc GCC_USB0_MASTER_CLK>,
404 <&gcc GCC_USB0_SLEEP_CLK>,
405 <&gcc GCC_USB0_MOCK_UTMI_CLK>,
406 <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
407 <&gcc GCC_CNOC_USB_CLK>;
415 assigned-clocks = <&gcc GCC_USB0_MASTER_CLK>,
416 <&gcc GCC_USB0_MOCK_UTMI_CLK>;
429 resets = <&gcc GCC_USB_BCR>;
435 clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;