Lines Matching +full:io +full:- +full:channel
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 * https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-mini-nano
8 * https://www.toradex.com/products/carrier-board/ivy-carrier-board
11 #include <dt-bindings/mux/mux.h>
12 #include <dt-bindings/leds/common.h>
16 ain1_voltage_unmanaged: voltage-divider-ain1 {
17 compatible = "voltage-divider";
18 #io-channel-cells = <1>;
19 io-channels = <&ivy_adc1 0>;
20 full-ohms = <19>;
21 output-ohms = <1>;
25 ain1_current_unmanaged: current-sense-shunt-ain1 {
26 compatible = "current-sense-shunt";
27 #io-channel-cells = <0>;
28 io-channels = <&ivy_adc1 1>;
29 shunt-resistor-micro-ohms = <100000000>;
32 /* AIN1_MODE - SODIMM 216 */
33 ain1_mode_mux_ctrl: mux-controller-0 {
34 compatible = "gpio-mux";
35 pinctrl-names = "default";
36 pinctrl-0 = <&pinctrl_gpio5>;
37 #mux-control-cells = <0>;
38 mux-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
41 ain1-voltage {
42 compatible = "io-channel-mux";
44 io-channels = <&ain1_voltage_unmanaged 0>;
45 io-channel-names = "parent";
46 mux-controls = <&ain1_mode_mux_ctrl>;
47 settle-time-us = <1000>;
50 ain1-current {
51 compatible = "io-channel-mux";
53 io-channels = <&ain1_current_unmanaged>;
54 io-channel-names = "parent";
55 mux-controls = <&ain1_mode_mux_ctrl>;
56 settle-time-us = <1000>;
60 ain2_voltage_unmanaged: voltage-divider-ain2 {
61 compatible = "voltage-divider";
62 #io-channel-cells = <1>;
63 io-channels = <&ivy_adc2 0>;
64 full-ohms = <19>;
65 output-ohms = <1>;
69 ain2_current_unmanaged: current-sense-shunt-ain2 {
70 compatible = "current-sense-shunt";
71 #io-channel-cells = <0>;
72 io-channels = <&ivy_adc2 1>;
73 shunt-resistor-micro-ohms = <100000000>;
76 /* AIN2_MODE - SODIMM 218 */
77 ain2_mode_mux_ctrl: mux-controller-1 {
78 compatible = "gpio-mux";
79 pinctrl-names = "default";
80 pinctrl-0 = <&pinctrl_gpio6>;
81 #mux-control-cells = <0>;
82 mux-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
85 ain2-voltage {
86 compatible = "io-channel-mux";
88 io-channels = <&ain2_voltage_unmanaged 0>;
89 io-channel-names = "parent";
90 mux-controls = <&ain2_mode_mux_ctrl>;
91 settle-time-us = <1000>;
94 ain2-current {
95 compatible = "io-channel-mux";
97 io-channels = <&ain2_current_unmanaged>;
98 io-channel-names = "parent";
99 mux-controls = <&ain2_mode_mux_ctrl>;
100 settle-time-us = <1000>;
104 compatible = "gpio-leds";
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_ivy_leds>;
108 /* D7 Blue - SODIMM 30 - LEDs.GPIO1 */
109 led-0 {
111 default-state = "off";
113 function-enumerator = <1>;
117 /* D7 Green - SODIMM 32 - LEDs.GPIO2 */
118 led-1 {
120 default-state = "off";
122 function-enumerator = <1>;
126 /* D7 Red - SODIMM 34 - LEDs.GPIO3 */
127 led-2 {
129 default-state = "off";
131 function-enumerator = <1>;
135 /* D8 Blue - SODIMM 36 - LEDs.GPIO4 */
136 led-3 {
138 default-state = "off";
140 function-enumerator = <2>;
144 /* D8 Green - SODIMM 54 - LEDs.GPIO5 */
145 led-4 {
147 default-state = "off";
149 function-enumerator = <2>;
153 /* D8 Red - SODIMM 44 - LEDs.GPIO6 */
154 led-5 {
156 default-state = "off";
158 function-enumerator = <2>;
162 /* D9 Blue - SODIMM 46 - LEDs.GPIO7 */
163 led-6 {
165 default-state = "off";
167 function-enumerator = <3>;
171 /* D9 Red - SODIMM 48 - LEDs.GPIO8 */
172 led-7 {
174 default-state = "off";
176 function-enumerator = <3>;
181 reg_3v2_ain1: regulator-3v2-ain1 {
182 compatible = "regulator-fixed";
183 regulator-max-microvolt = <3200000>;
184 regulator-min-microvolt = <3200000>;
185 regulator-name = "+3V2_AIN1";
188 reg_3v2_ain2: regulator-3v2-ain2 {
189 compatible = "regulator-fixed";
190 regulator-max-microvolt = <3200000>;
191 regulator-min-microvolt = <3200000>;
192 regulator-name = "+3V2_AIN2";
196 ivy-input-voltage {
197 compatible = "voltage-divider";
199 io-channels = <&verdin_som_adc 7>;
200 full-ohms = <204700>; /* 200k + 4.7k */
201 output-ohms = <4700>;
204 ivy-5v-voltage {
205 compatible = "voltage-divider";
207 io-channels = <&verdin_som_adc 6>;
208 full-ohms = <39000>; /* 27k + 12k */
209 output-ohms = <12000>;
212 ivy-3v3-voltage {
213 compatible = "voltage-divider";
215 io-channels = <&verdin_som_adc 5>;
216 full-ohms = <54000>; /* 27k + 27k */
217 output-ohms = <27000>;
220 ivy-1v8-voltage {
221 compatible = "voltage-divider";
223 io-channels = <&verdin_som_adc 4>;
224 full-ohms = <39000>; /* 12k + 27k */
225 output-ohms = <27000>;
231 pinctrl-0 = <&pinctrl_ecspi2>,
234 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
240 compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
242 spi-max-frequency = <18500000>;
248 address-width = <16>;
250 spi-max-frequency = <33000000>;
266 gpio-line-names =
296 gpio-line-names =
302 "GPIO2", /* Verdin GPIO_2 - SODIMM 208 */
323 "GPIO3", /* Verdin GPIO_3 - SODIMM 210 */
342 pinctrl-names = "default";
343 pinctrl-0 = <&pinctrl_gpio7>;
344 interrupt-parent = <&gpio1>;
346 avdd-supply = <®_3v2_ain1>;
347 dvdd-supply = <®_3v2_ain1>;
348 vref-supply = <®_3v2_ain1>;
349 #address-cells = <1>;
350 #io-channel-cells = <1>;
351 #size-cells = <0>;
353 /* AIN1 0-33V Voltage Input */
354 channel@0 {
356 diff-channels = <0 1>;
359 /* AIN1 0-20mA Current Input */
360 channel@1 {
362 diff-channels = <2 3>;
369 pinctrl-names = "default";
370 pinctrl-0 = <&pinctrl_gpio8>;
371 interrupt-parent = <&gpio1>;
373 avdd-supply = <®_3v2_ain2>;
374 dvdd-supply = <®_3v2_ain2>;
375 vref-supply = <®_3v2_ain2>;
376 #address-cells = <1>;
377 #io-channel-cells = <1>;
378 #size-cells = <0>;
380 /* AIN2 0-33V Voltage Input */
381 channel@0 {
383 diff-channels = <0 1>;
386 /* AIN2 0-20mA Current Input */
387 channel@1 {
389 diff-channels = <2 3>;
420 linux,rs485-enabled-at-boot-time;
421 rs485-rx-during-tx;
442 pinctrl-names = "default";
443 pinctrl-0 = <&pinctrl_gpio2>, <&pinctrl_gpio3>,