Lines Matching full:clkc

10 #include <dt-bindings/clock/gxbb-clkc.h>
23 			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
33 			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
42 			clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
54 			clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
66 	clocks = <&clkc CLKID_AIU_GLUE>,
67 		 <&clkc CLKID_I2S_OUT>,
68 		 <&clkc CLKID_AOCLK_GATE>,
69 		 <&clkc CLKID_CTS_AMCLK>,
70 		 <&clkc CLKID_MIXER_IFACE>,
71 		 <&clkc CLKID_IEC958>,
72 		 <&clkc CLKID_IEC958_GATE>,
73 		 <&clkc CLKID_CTS_MCLK_I958>,
74 		 <&clkc CLKID_CTS_I958>;
274 		clocks = <&clkc CLKID_SPI>;
286 	clocks = <&xtal>, <&clkc CLKID_CLK81>;
291 	clocks = <&clkc CLKID_EFUSE>;
295 	clocks = <&clkc CLKID_ETH>,
296 		 <&clkc CLKID_FCLK_DIV2>,
297 		 <&clkc CLKID_MPLL2>,
298 		 <&clkc CLKID_FCLK_DIV2>;
314 	clocks = <&clkc CLKID_HDMI>,
315 		 <&clkc CLKID_HDMI_PCLK>,
316 		 <&clkc CLKID_GCLK_VENCI_INT0>;
320 	assigned-clocks = <&clkc CLKID_HDMI_SEL>,
321 			  <&clkc CLKID_HDMI>;
327 	clkc: clock-controller {  label
328 		compatible = "amlogic,gxbb-clkc";
336 	clocks = <&clkc CLKID_RNG0>;
341 	clocks = <&clkc CLKID_I2C>;
345 	clocks = <&clkc CLKID_AO_I2C>;
349 	clocks = <&clkc CLKID_I2C>;
353 	clocks = <&clkc CLKID_I2C>;
359 	clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
362 	assigned-clocks = <&clkc CLKID_GP0_PLL>;
758 	clocks = <&clkc CLKID_VPU>,
759 	         <&clkc CLKID_VAPB>;
767 	assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
768 			  <&clkc CLKID_VPU_0>,
769 			  <&clkc CLKID_VPU>, /* Glitch free mux */
770 			  <&clkc CLKID_VAPB_0_SEL>,
771 			  <&clkc CLKID_VAPB_0>,
772 			  <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
773 	assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
775 				 <&clkc CLKID_VPU_0>,
776 				 <&clkc CLKID_FCLK_DIV4>,
778 				 <&clkc CLKID_VAPB_0>;
790 		 <&clkc CLKID_SAR_ADC>,
791 		 <&clkc CLKID_SAR_ADC_CLK>,
792 		 <&clkc CLKID_SAR_ADC_SEL>;
797 	clocks = <&clkc CLKID_SD_EMMC_A>,
798 		 <&clkc CLKID_SD_EMMC_A_CLK0>,
799 		 <&clkc CLKID_FCLK_DIV2>;
805 	clocks = <&clkc CLKID_SD_EMMC_B>,
806 		 <&clkc CLKID_SD_EMMC_B_CLK0>,
807 		 <&clkc CLKID_FCLK_DIV2>;
813 	clocks = <&clkc CLKID_SD_EMMC_C>,
814 		 <&clkc CLKID_SD_EMMC_C_CLK0>,
815 		 <&clkc CLKID_FCLK_DIV2>;
821 	clocks = <&clkc CLKID_HDMI_PCLK>,
822 		 <&clkc CLKID_CLK81>,
823 		 <&clkc CLKID_GCLK_VENCI_INT0>;
827 	clocks = <&clkc CLKID_SPICC>;
834 	clocks = <&clkc CLKID_SPI>;
838 	clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
853 	clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
858 	clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
869 	clocks = <&clkc CLKID_DOS_PARSER>,
870 		 <&clkc CLKID_DOS>,
871 		 <&clkc CLKID_VDEC_1>,
872 		 <&clkc CLKID_VDEC_HEVC>;