Lines Matching +full:reg +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
19 #include <dt-bindings/clock/exynos4.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
21 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
25 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <1>;
55 compatible = "arm,cortex-a9-pmu";
56 interrupt-parent = <&combiner>;
61 compatible = "simple-bus";
62 #address-cells = <1>;
63 #size-cells = <1>;
66 clock_audss: clock-controller@3810000 {
67 compatible = "samsung,exynos4210-audss-clock";
68 reg = <0x03810000 0x0c>;
69 #clock-cells = <1>;
73 clock-names = "pll_ref", "pll_in", "sclk_audio",
78 compatible = "samsung,s5pv210-i2s";
79 reg = <0x03830000 0x100>;
83 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
84 #clock-cells = <1>;
85 clock-output-names = "i2s_cdclk0";
87 dma-names = "tx", "rx", "tx-sec";
88 samsung,idma-addr = <0x03000000>;
89 #sound-dai-cells = <1>;
94 compatible = "samsung,exynos4210-chipid";
95 reg = <0x10000000 0x100>;
98 scu: snoop-control-unit@10500000 {
99 compatible = "arm,cortex-a9-scu";
100 reg = <0x10500000 0x2000>;
103 memory-controller@12570000 {
104 compatible = "samsung,exynos4210-srom";
105 reg = <0x12570000 0x14>;
108 pd_mfc: power-domain@10023c40 {
109 compatible = "samsung,exynos4210-pd";
110 reg = <0x10023c40 0x20>;
111 #power-domain-cells = <0>;
115 pd_g3d: power-domain@10023c60 {
116 compatible = "samsung,exynos4210-pd";
117 reg = <0x10023c60 0x20>;
118 #power-domain-cells = <0>;
122 pd_lcd0: power-domain@10023c80 {
123 compatible = "samsung,exynos4210-pd";
124 reg = <0x10023c80 0x20>;
125 #power-domain-cells = <0>;
129 pd_tv: power-domain@10023c20 {
130 compatible = "samsung,exynos4210-pd";
131 reg = <0x10023c20 0x20>;
132 #power-domain-cells = <0>;
133 power-domains = <&pd_lcd0>;
137 pd_cam: power-domain@10023c00 {
138 compatible = "samsung,exynos4210-pd";
139 reg = <0x10023c00 0x20>;
140 #power-domain-cells = <0>;
144 pd_gps: power-domain@10023ce0 {
145 compatible = "samsung,exynos4210-pd";
146 reg = <0x10023ce0 0x20>;
147 #power-domain-cells = <0>;
151 pd_gps_alive: power-domain@10023d00 {
152 compatible = "samsung,exynos4210-pd";
153 reg = <0x10023d00 0x20>;
154 #power-domain-cells = <0>;
158 gic: interrupt-controller@10490000 {
159 compatible = "arm,cortex-a9-gic";
160 #interrupt-cells = <3>;
161 interrupt-controller;
162 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
165 combiner: interrupt-controller@10440000 {
166 compatible = "samsung,exynos4210-combiner";
167 #interrupt-cells = <2>;
168 interrupt-controller;
169 reg = <0x10440000 0x1000>;
173 compatible = "samsung,exynos4-sysreg", "syscon";
174 reg = <0x10010000 0x400>;
177 pmu_system_controller: system-controller@10020000 {
178 compatible = "samsung,exynos4210-pmu", "simple-mfd", "syscon";
179 reg = <0x10020000 0x4000>;
180 interrupt-controller;
181 #interrupt-cells = <3>;
182 interrupt-parent = <&gic>;
184 mipi_phy: mipi-phy {
185 compatible = "samsung,s5pv210-mipi-video-phy";
186 #phy-cells = <1>;
191 compatible = "samsung,exynos4210-mipi-dsi";
192 reg = <0x11c80000 0x10000>;
194 power-domains = <&pd_lcd0>;
196 phy-names = "dsim";
198 clock-names = "bus_clk", "sclk_mipi";
200 #address-cells = <1>;
201 #size-cells = <0>;
208 #address-cells = <1>;
209 #size-cells = <1>;
210 #clock-cells = <1>;
211 clock-output-names = "cam_a_clkout", "cam_b_clkout";
214 compatible = "samsung,exynos4210-fimc";
215 reg = <0x0 0x1000>;
219 clock-names = "fimc", "sclk_fimc";
220 power-domains = <&pd_cam>;
227 compatible = "samsung,exynos4210-fimc";
228 reg = <0x00010000 0x1000>;
232 clock-names = "fimc", "sclk_fimc";
233 power-domains = <&pd_cam>;
240 compatible = "samsung,exynos4210-fimc";
241 reg = <0x00020000 0x1000>;
245 clock-names = "fimc", "sclk_fimc";
246 power-domains = <&pd_cam>;
253 compatible = "samsung,exynos4210-fimc";
254 reg = <0x00030000 0x1000>;
258 clock-names = "fimc", "sclk_fimc";
259 power-domains = <&pd_cam>;
266 compatible = "samsung,exynos4210-csis";
267 reg = <0x00080000 0x4000>;
271 clock-names = "csis", "sclk_csis";
272 bus-width = <4>;
273 power-domains = <&pd_cam>;
275 phy-names = "csis";
277 #address-cells = <1>;
278 #size-cells = <0>;
282 compatible = "samsung,exynos4210-csis";
283 reg = <0x00090000 0x4000>;
287 clock-names = "csis", "sclk_csis";
288 bus-width = <2>;
289 power-domains = <&pd_cam>;
291 phy-names = "csis";
293 #address-cells = <1>;
294 #size-cells = <0>;
299 compatible = "samsung,s3c6410-rtc";
300 reg = <0x10070000 0x100>;
301 interrupt-parent = <&pmu_system_controller>;
305 clock-names = "rtc";
310 compatible = "samsung,s5pv210-keypad";
311 reg = <0x100a0000 0x100>;
314 clock-names = "keypad";
319 compatible = "samsung,exynos4210-sdhci";
320 reg = <0x12510000 0x100>;
323 clock-names = "hsmmc", "mmc_busclk.2";
328 compatible = "samsung,exynos4210-sdhci";
329 reg = <0x12520000 0x100>;
332 clock-names = "hsmmc", "mmc_busclk.2";
337 compatible = "samsung,exynos4210-sdhci";
338 reg = <0x12530000 0x100>;
341 clock-names = "hsmmc", "mmc_busclk.2";
346 compatible = "samsung,exynos4210-sdhci";
347 reg = <0x12540000 0x100>;
350 clock-names = "hsmmc", "mmc_busclk.2";
354 exynos_usbphy: usb-phy@125b0000 {
355 compatible = "samsung,exynos4210-usb2-phy";
356 reg = <0x125b0000 0x100>;
357 samsung,pmureg-phandle = <&pmu_system_controller>;
359 clock-names = "phy", "ref";
360 #phy-cells = <1>;
365 compatible = "samsung,s3c6400-hsotg";
366 reg = <0x12480000 0x20000>;
369 clock-names = "otg";
371 phy-names = "usb2-phy";
376 compatible = "samsung,exynos4210-ehci";
377 reg = <0x12580000 0x100>;
380 clock-names = "usbhost";
383 phy-names = "host", "hsic0", "hsic1";
387 compatible = "samsung,exynos4210-ohci";
388 reg = <0x12590000 0x100>;
391 clock-names = "usbhost";
394 phy-names = "host";
398 compatible = "samsung,exynos4210-mali", "arm,mali-400";
399 reg = <0x13000000 0x10000>;
401 * CLK_G3D is not actually bus clock but a IP-level clock.
406 clock-names = "bus", "core";
407 power-domains = <&pd_g3d>;
412 compatible = "samsung,s3c6410-i2s";
413 reg = <0x13960000 0x100>;
415 clock-names = "iis";
416 #clock-cells = <1>;
417 clock-output-names = "i2s_cdclk1";
419 dma-names = "tx", "rx";
420 #sound-dai-cells = <1>;
425 compatible = "samsung,s3c6410-i2s";
426 reg = <0x13970000 0x100>;
428 clock-names = "iis";
429 #clock-cells = <1>;
430 clock-output-names = "i2s_cdclk2";
432 dma-names = "tx", "rx";
433 #sound-dai-cells = <1>;
438 compatible = "samsung,mfc-v5";
439 reg = <0x13400000 0x10000>;
441 power-domains = <&pd_mfc>;
443 clock-names = "mfc", "sclk_mfc";
445 iommu-names = "left", "right";
449 compatible = "samsung,exynos4210-uart";
450 reg = <0x13800000 0x100>;
453 clock-names = "uart", "clk_uart_baud0";
455 dma-names = "rx", "tx";
460 compatible = "samsung,exynos4210-uart";
461 reg = <0x13810000 0x100>;
464 clock-names = "uart", "clk_uart_baud0";
466 dma-names = "rx", "tx";
471 compatible = "samsung,exynos4210-uart";
472 reg = <0x13820000 0x100>;
475 clock-names = "uart", "clk_uart_baud0";
477 dma-names = "rx", "tx";
482 compatible = "samsung,exynos4210-uart";
483 reg = <0x13830000 0x100>;
486 clock-names = "uart", "clk_uart_baud0";
488 dma-names = "rx", "tx";
493 #address-cells = <1>;
494 #size-cells = <0>;
495 compatible = "samsung,s3c2440-i2c";
496 reg = <0x13860000 0x100>;
499 clock-names = "i2c";
500 pinctrl-names = "default";
501 pinctrl-0 = <&i2c0_bus>;
506 #address-cells = <1>;
507 #size-cells = <0>;
508 compatible = "samsung,s3c2440-i2c";
509 reg = <0x13870000 0x100>;
512 clock-names = "i2c";
513 pinctrl-names = "default";
514 pinctrl-0 = <&i2c1_bus>;
519 #address-cells = <1>;
520 #size-cells = <0>;
521 compatible = "samsung,s3c2440-i2c";
522 reg = <0x13880000 0x100>;
525 clock-names = "i2c";
526 pinctrl-names = "default";
527 pinctrl-0 = <&i2c2_bus>;
532 #address-cells = <1>;
533 #size-cells = <0>;
534 compatible = "samsung,s3c2440-i2c";
535 reg = <0x13890000 0x100>;
538 clock-names = "i2c";
539 pinctrl-names = "default";
540 pinctrl-0 = <&i2c3_bus>;
545 #address-cells = <1>;
546 #size-cells = <0>;
547 compatible = "samsung,s3c2440-i2c";
548 reg = <0x138a0000 0x100>;
551 clock-names = "i2c";
552 pinctrl-names = "default";
553 pinctrl-0 = <&i2c4_bus>;
558 #address-cells = <1>;
559 #size-cells = <0>;
560 compatible = "samsung,s3c2440-i2c";
561 reg = <0x138b0000 0x100>;
564 clock-names = "i2c";
565 pinctrl-names = "default";
566 pinctrl-0 = <&i2c5_bus>;
571 #address-cells = <1>;
572 #size-cells = <0>;
573 compatible = "samsung,s3c2440-i2c";
574 reg = <0x138c0000 0x100>;
577 clock-names = "i2c";
578 pinctrl-names = "default";
579 pinctrl-0 = <&i2c6_bus>;
584 #address-cells = <1>;
585 #size-cells = <0>;
586 compatible = "samsung,s3c2440-i2c";
587 reg = <0x138d0000 0x100>;
590 clock-names = "i2c";
591 pinctrl-names = "default";
592 pinctrl-0 = <&i2c7_bus>;
597 #address-cells = <1>;
598 #size-cells = <0>;
599 compatible = "samsung,s3c2440-hdmiphy-i2c";
600 reg = <0x138e0000 0x100>;
603 clock-names = "i2c";
606 hdmi_i2c_phy: hdmi-phy@38 {
607 compatible = "samsung,exynos4210-hdmiphy";
608 reg = <0x38>;
613 compatible = "samsung,exynos4210-spi";
614 reg = <0x13920000 0x100>;
617 dma-names = "tx", "rx";
618 #address-cells = <1>;
619 #size-cells = <0>;
621 clock-names = "spi", "spi_busclk0";
622 pinctrl-names = "default";
623 pinctrl-0 = <&spi0_bus>;
624 fifo-depth = <256>;
629 compatible = "samsung,exynos4210-spi";
630 reg = <0x13930000 0x100>;
633 dma-names = "tx", "rx";
634 #address-cells = <1>;
635 #size-cells = <0>;
637 clock-names = "spi", "spi_busclk0";
638 pinctrl-names = "default";
639 pinctrl-0 = <&spi1_bus>;
640 fifo-depth = <64>;
645 compatible = "samsung,exynos4210-spi";
646 reg = <0x13940000 0x100>;
649 dma-names = "tx", "rx";
650 #address-cells = <1>;
651 #size-cells = <0>;
653 clock-names = "spi", "spi_busclk0";
654 pinctrl-names = "default";
655 pinctrl-0 = <&spi2_bus>;
656 fifo-depth = <64>;
661 compatible = "samsung,exynos4210-pwm";
662 reg = <0x139d0000 0x1000>;
669 clock-names = "timers";
670 #pwm-cells = <3>;
674 pdma0: dma-controller@12680000 {
676 reg = <0x12680000 0x1000>;
679 clock-names = "apb_pclk";
680 #dma-cells = <1>;
683 pdma1: dma-controller@12690000 {
685 reg = <0x12690000 0x1000>;
688 clock-names = "apb_pclk";
689 #dma-cells = <1>;
692 mdma1: dma-controller@12850000 {
694 reg = <0x12850000 0x1000>;
697 clock-names = "apb_pclk";
698 #dma-cells = <1>;
702 compatible = "samsung,exynos4210-fimd";
703 interrupt-parent = <&combiner>;
704 reg = <0x11c00000 0x20000>;
705 interrupt-names = "fifo", "vsync", "lcd_sys";
708 clock-names = "sclk_fimd", "fimd";
709 power-domains = <&pd_lcd0>;
716 interrupt-parent = <&combiner>;
717 reg = <0x100c0000 0x100>;
720 #thermal-sensor-cells = <0>;
723 jpeg_codec: jpeg-codec@11840000 {
724 compatible = "samsung,exynos4210-jpeg";
725 reg = <0x11840000 0x1000>;
728 clock-names = "jpeg";
729 power-domains = <&pd_cam>;
734 compatible = "samsung,exynos4210-rotator";
735 reg = <0x12810000 0x64>;
738 clock-names = "rotator";
743 compatible = "samsung,exynos4210-hdmi";
744 reg = <0x12d00000 0x70000>;
746 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
753 power-domains = <&pd_tv>;
754 samsung,syscon-phandle = <&pmu_system_controller>;
755 #sound-dai-cells = <0>;
760 compatible = "samsung,s5p-cec";
761 reg = <0x100b0000 0x200>;
764 clock-names = "hdmicec";
765 samsung,syscon-phandle = <&pmu_system_controller>;
766 hdmi-phandle = <&hdmi>;
767 pinctrl-names = "default";
768 pinctrl-0 = <&hdmi_cec>;
773 compatible = "samsung,exynos4210-mixer";
775 reg = <0x12c10000 0x2100>, <0x12c00000 0x300>;
776 power-domains = <&pd_tv>;
782 compatible = "samsung,exynos-ppmu";
783 reg = <0x106a0000 0x2000>;
785 clock-names = "ppmu";
790 compatible = "samsung,exynos-ppmu";
791 reg = <0x106b0000 0x2000>;
793 clock-names = "ppmu";
798 compatible = "samsung,exynos-ppmu";
799 reg = <0x106c0000 0x2000>;
801 clock-names = "ppmu";
806 compatible = "samsung,exynos-ppmu";
807 reg = <0x112a0000 0x2000>;
809 clock-names = "ppmu";
814 compatible = "samsung,exynos-ppmu";
815 reg = <0x116a0000 0x2000>;
817 clock-names = "ppmu";
822 compatible = "samsung,exynos-ppmu";
823 reg = <0x11ac0000 0x2000>;
825 clock-names = "ppmu";
830 compatible = "samsung,exynos-ppmu";
831 reg = <0x11e40000 0x2000>;
833 clock-names = "ppmu";
838 compatible = "samsung,exynos-ppmu";
839 reg = <0x12630000 0x2000>;
844 compatible = "samsung,exynos-ppmu";
845 reg = <0x12aa0000 0x2000>;
847 clock-names = "ppmu";
852 compatible = "samsung,exynos-ppmu";
853 reg = <0x12e40000 0x2000>;
855 clock-names = "ppmu";
860 compatible = "samsung,exynos-ppmu";
861 reg = <0x13220000 0x2000>;
863 clock-names = "ppmu";
868 compatible = "samsung,exynos-ppmu";
869 reg = <0x13660000 0x2000>;
871 clock-names = "ppmu";
876 compatible = "samsung,exynos-ppmu";
877 reg = <0x13670000 0x2000>;
879 clock-names = "ppmu";
884 compatible = "samsung,exynos-sysmmu";
885 reg = <0x13620000 0x1000>;
886 interrupt-parent = <&combiner>;
888 clock-names = "sysmmu", "master";
890 power-domains = <&pd_mfc>;
891 #iommu-cells = <0>;
895 compatible = "samsung,exynos-sysmmu";
896 reg = <0x13630000 0x1000>;
897 interrupt-parent = <&combiner>;
899 clock-names = "sysmmu", "master";
901 power-domains = <&pd_mfc>;
902 #iommu-cells = <0>;
906 compatible = "samsung,exynos-sysmmu";
907 reg = <0x12e20000 0x1000>;
908 interrupt-parent = <&combiner>;
910 clock-names = "sysmmu", "master";
912 power-domains = <&pd_tv>;
913 #iommu-cells = <0>;
917 compatible = "samsung,exynos-sysmmu";
918 reg = <0x11a20000 0x1000>;
919 interrupt-parent = <&combiner>;
921 clock-names = "sysmmu", "master";
923 power-domains = <&pd_cam>;
924 #iommu-cells = <0>;
928 compatible = "samsung,exynos-sysmmu";
929 reg = <0x11a30000 0x1000>;
930 interrupt-parent = <&combiner>;
932 clock-names = "sysmmu", "master";
934 power-domains = <&pd_cam>;
935 #iommu-cells = <0>;
939 compatible = "samsung,exynos-sysmmu";
940 reg = <0x11a40000 0x1000>;
941 interrupt-parent = <&combiner>;
943 clock-names = "sysmmu", "master";
945 power-domains = <&pd_cam>;
946 #iommu-cells = <0>;
950 compatible = "samsung,exynos-sysmmu";
951 reg = <0x11a50000 0x1000>;
952 interrupt-parent = <&combiner>;
954 clock-names = "sysmmu", "master";
956 power-domains = <&pd_cam>;
957 #iommu-cells = <0>;
961 compatible = "samsung,exynos-sysmmu";
962 reg = <0x11a60000 0x1000>;
963 interrupt-parent = <&combiner>;
965 clock-names = "sysmmu", "master";
967 power-domains = <&pd_cam>;
968 #iommu-cells = <0>;
972 compatible = "samsung,exynos-sysmmu";
973 reg = <0x12a30000 0x1000>;
974 interrupt-parent = <&combiner>;
976 clock-names = "sysmmu", "master";
979 #iommu-cells = <0>;
983 compatible = "samsung,exynos-sysmmu";
984 reg = <0x11e20000 0x1000>;
985 interrupt-parent = <&combiner>;
987 clock-names = "sysmmu", "master";
989 power-domains = <&pd_lcd0>;
990 #iommu-cells = <0>;
994 compatible = "samsung,exynos4210-secss";
995 reg = <0x10830000 0x300>;
998 clock-names = "secss";
1002 compatible = "samsung,exynos4-rng";
1003 reg = <0x10830400 0x200>;
1005 clock-names = "secss";
1010 #include "exynos-syscon-restart.dtsi"