Lines Matching +full:i2c +full:- +full:bus +full:- +full:name
2 Kernel driver i2c-piix4
9 * ServerWorks OSB4, CSB5, CSB6, HT-1000 and HT-1100 southbridges
18 * AMD Hudson-2, ML, CZ
26 - Frodo Looijaard <[email protected]>
27 - Philip Edelbrock <[email protected]>
31 -----------------
40 -----------
43 functionality. Among other things, it implements the PCI bus. One of its
44 minor functions is implementing a System Management Bus. This is a true
45 SMBus - you can not access it on I2C levels. The good news is that it
47 timing problems. The bad news is that non-SMBus devices connected to it can
50 Do ``lspci -v`` and see whether it contains an entry like this::
55 Bus and device numbers may differ, but the function number must be
74 The PIIX/PIIX3 does not implement an SMBus or I2C bus, so you can't use
78 identical to the PIIX4 in I2C/SMBus support.
80 The AMD SB700, SB800, SP5100 and Hudson-2 chipsets implement two
81 PIIX4-compatible SMBus controllers. If your BIOS initializes the
92 for all possible PCI ids (and ``lspci -n`` to match them). Let's assume the
95 command: ``lspci -xxx -s 00:0f.0``
97 ``setpci -s 00:0f.0 d2.b=1``
103 Hardware-specific issues
104 ------------------------
115 ----------------------------
117 Device driver for the PIIX4 chip creates a separate I2C bus for each of its
120 $ i2cdetect -l
122 i2c-7 unknown SMBus PIIX4 adapter port 0 at 0b00 N/A
123 i2c-8 unknown SMBus PIIX4 adapter port 2 at 0b00 N/A
124 i2c-9 unknown SMBus PIIX4 adapter port 1 at 0b20 N/A
132 Name (_ADR, 0x00140000)
135 Name (_ADR, 0)
138 Name (_ADR, 1)
141 Name (_ADR, 2)
152 driver to the 0x1C device on the I2C bus created by the PIIX port 0::
155 Name (_HID, "PRP0001")
156 Name (_DDN, "JC42 Temperature sensor")
157 Name (_CRS, ResourceTemplate () {
168 Name (_DSD, Package () {
169 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
171 Package () { "compatible", Package() { "jedec,jc-42.4-temp" } },