Lines Matching +full:low +full:- +full:power
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Li Jun <[email protected]>
16 - items:
17 - const: fsl,imx95-dwc3
18 - const: fsl,imx8mp-dwc3
19 - const: fsl,imx8mp-dwc3
23 - description: Address and length of the register set for HSIO Block Control
24 - description: Address and length of the register set for the wrapper of dwc3 core on the SOC.
26 "#address-cells":
29 "#size-cells":
32 dma-ranges:
45 A list of phandle and clock-specifier pairs for the clocks
46 listed in clock-names.
48 - description: system hsio root clock.
49 - description: suspend clock, used for usb wakeup logic.
51 clock-names:
53 - const: hsio
54 - const: suspend
56 fsl,permanently-attached:
62 fsl,disable-port-power-control:
66 power control. Defines Bit 3 in capability register (HCCPARAMS).
68 fsl,over-current-active-low:
71 Over current signal polarity is active low.
73 fsl,power-active-low:
76 Power pad (PWR) polarity is active low.
78 power-domains:
84 "^usb@[0-9a-f]+$":
88 - compatible
89 - reg
90 - "#address-cells"
91 - "#size-cells"
92 - dma-ranges
93 - ranges
94 - clocks
95 - clock-names
96 - interrupts
97 - power-domains
102 - |
103 #include <dt-bindings/clock/imx8mp-clock.h>
104 #include <dt-bindings/power/imx8mp-power.h>
105 #include <dt-bindings/interrupt-controller/arm-gic.h>
107 compatible = "fsl,imx8mp-dwc3";
112 clock-names = "hsio", "suspend";
114 power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>;
115 #address-cells = <1>;
116 #size-cells = <1>;
117 dma-ranges = <0x40000000 0x40000000 0xc0000000>;
126 clock-names = "bus_early", "ref", "suspend";
127 assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
128 assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
129 assigned-clock-rates = <500000000>;
132 phy-names = "usb2-phy", "usb3-phy";
133 snps,dis-u2-freeclk-exists-quirk;