Lines Matching full:sram

29       Should contain the address ranges for memory regions SRAM, CFG, and,
81       local SCP SRAM address spaces to bus addresses.
93       Each SCP core has own cache memory. The SRAM and L1TCM are shared by
94       cores. The power of cache, SRAM and L1TCM power should be enabled
95       before booting SCP cores. The size of cache, SRAM, and L1TCM are varied
109         description: The base address and size of SRAM.
113         const: sram
177             - const: sram
191             - const: sram
220         reg-names = "sram", "cfg", "l1tcm";
244             reg-names = "sram";
255             reg-names = "sram";