Lines Matching +full:power +full:- +full:domain +full:- +full:names
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/mediatek,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek Power Domains Controller
10 - MandyJH Liu <[email protected]>
11 - Matthias Brugger <[email protected]>
14 Mediatek processors include support for multiple power domains which can be
15 powered up/down by software based on different application scenes to save power.
17 IP cores belonging to a power domain should contain a 'power-domains'
18 property that is a phandle for SCPSYS node representing the domain.
22 pattern: '^power-controller(@[0-9a-f]+)?$'
26 - mediatek,mt6735-power-controller
27 - mediatek,mt6795-power-controller
28 - mediatek,mt8167-power-controller
29 - mediatek,mt8173-power-controller
30 - mediatek,mt8183-power-controller
31 - mediatek,mt8186-power-controller
32 - mediatek,mt8188-power-controller
33 - mediatek,mt8192-power-controller
34 - mediatek,mt8195-power-controller
35 - mediatek,mt8365-power-controller
37 '#power-domain-cells':
40 '#address-cells':
43 '#size-cells':
47 "^power-domain@[0-9a-f]+$":
48 $ref: "#/$defs/power-domain-node"
50 "^power-domain@[0-9a-f]+$":
51 $ref: "#/$defs/power-domain-node"
53 "^power-domain@[0-9a-f]+$":
54 $ref: "#/$defs/power-domain-node"
56 "^power-domain@[0-9a-f]+$":
57 $ref: "#/$defs/power-domain-node"
59 "^power-domain@[0-9a-f]+$":
60 $ref: "#/$defs/power-domain-node"
68 power-domain-node:
71 Represents the power domains within the power controller node as documented
72 in Documentation/devicetree/bindings/power/power-domain.yaml.
76 '#power-domain-cells':
78 Must be 0 for nodes representing a single PM domain and 1 for nodes
81 '#address-cells':
84 '#size-cells':
89 Power domain index. Valid values are defined in:
90 "include/dt-bindings/power/mt6795-power.h" - for MT8167 type power domain.
91 "include/dt-bindings/power/mt8167-power.h" - for MT8167 type power domain.
92 "include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain.
93 "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.
94 "include/dt-bindings/power/mediatek,mt8188-power.h" - for MT8188 type power domain.
95 "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
96 "include/dt-bindings/power/mt8195-power.h" - for MT8195 type power domain.
97 "include/dt-bindings/power/mediatek,mt8365-power.h" - for MT8365 type power domain.
102 A number of phandles to clocks that need to be enabled during domain
103 power-up sequencing.
105 clock-names:
107 List of names of clocks, in order to match the power-up sequencing
108 for each power domain we need to group the clocks by name. BASIC
109 clocks need to be enabled before enabling the corresponding power
110 domain, and should not have a '-' in their name (i.e mm, mfg, venc).
112 and should contain a '-' in their name (i.e mm-0, isp-0, cam-0).
114 In order to follow properly the power-up sequencing, the clocks must
118 domain-supply:
119 description: domain regulator supply.
125 mediatek,infracfg-nao:
127 description: phandle to the device containing the INFRACFG-NAO register range.
134 - reg
137 - compatible
142 - |
143 #include <dt-bindings/clock/mt8173-clk.h>
144 #include <dt-bindings/power/mt8173-power.h>
147 #address-cells = <2>;
148 #size-cells = <2>;
151 compatible = "mediatek,mt8173-scpsys", "syscon", "simple-mfd";
154 spm: power-controller {
155 compatible = "mediatek,mt8173-power-controller";
156 #address-cells = <1>;
157 #size-cells = <0>;
158 #power-domain-cells = <1>;
160 /* power domains of the SoC */
161 power-domain@MT8173_POWER_DOMAIN_VDEC {
164 clock-names = "mm";
165 #power-domain-cells = <0>;
167 power-domain@MT8173_POWER_DOMAIN_VENC {
171 clock-names = "mm", "venc";
172 #power-domain-cells = <0>;
174 power-domain@MT8173_POWER_DOMAIN_ISP {
177 clock-names = "mm";
178 #power-domain-cells = <0>;
180 power-domain@MT8173_POWER_DOMAIN_MM {
183 clock-names = "mm";
184 #power-domain-cells = <0>;
187 power-domain@MT8173_POWER_DOMAIN_VENC_LT {
191 clock-names = "mm", "venclt";
192 #power-domain-cells = <0>;
194 power-domain@MT8173_POWER_DOMAIN_AUDIO {
196 #power-domain-cells = <0>;
198 power-domain@MT8173_POWER_DOMAIN_USB {
200 #power-domain-cells = <0>;
202 power-domain@MT8173_POWER_DOMAIN_MFG_ASYNC {
205 clock-names = "mfg";
206 #address-cells = <1>;
207 #size-cells = <0>;
208 #power-domain-cells = <1>;
210 power-domain@MT8173_POWER_DOMAIN_MFG_2D {
212 #address-cells = <1>;
213 #size-cells = <0>;
214 #power-domain-cells = <1>;
216 power-domain@MT8173_POWER_DOMAIN_MFG {
218 #power-domain-cells = <0>;