Lines Matching +full:msi +full:- +full:controller
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Brcmstb PCIe Host Controller
10 - Jim Quinlan <[email protected]>
15 - enum:
16 - brcm,bcm2711-pcie # The Raspberry Pi 4
17 - brcm,bcm4908-pcie
18 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
19 - brcm,bcm7216-pcie # Broadcom 7216 Arm
20 - brcm,bcm7278-pcie # Broadcom 7278 Arm
21 - brcm,bcm7425-pcie # Broadcom 7425 MIPs
22 - brcm,bcm7435-pcie # Broadcom 7435 MIPs
23 - brcm,bcm7445-pcie # Broadcom 7445 Arm
24 - brcm,bcm7712-pcie # Broadcom STB sibling of Rpi 5
32 - description: PCIe host controller
33 - description: builtin MSI controller
35 interrupt-names:
38 - const: pcie
39 - const: msi
45 dma-ranges:
52 clock-names:
54 - const: sw_pcie
56 msi-controller:
57 description: Identifies the node as an MSI controller.
59 msi-parent:
60 description: MSI controller the device is capable of using.
62 brcm,enable-ssc:
63 description: Indicates usage of spread-spectrum clocking.
66 aspm-no-l0s: true
68 brcm,clkreq-mode:
71 signal. There are three different modes -- "safe", which drives the
73 not provide any power savings; "no-l1ss" -- which provides Clock
77 potentially hanging the system; "default" -- which provides L0s, L1,
84 enum: [ safe, no-l1ss, default ]
86 brcm,scb-sizes:
88 viewport size of a memory controller. There may be up to
91 controller supports. Note that each memory controller
92 may have two component regions -- base and extended -- so
93 this information cannot be deduced from the dma-ranges.
94 $ref: /schemas/types.yaml#/definitions/uint64-array
102 reset-names:
107 - compatible
108 - reg
109 - ranges
110 - dma-ranges
111 - "#interrupt-cells"
112 - interrupts
113 - interrupt-names
114 - interrupt-map-mask
115 - interrupt-map
116 - msi-controller
119 - $ref: /schemas/pci/pci-host-bridge.yaml#
120 - $ref: /schemas/interrupt-controller/msi-controller.yaml#
121 - if:
125 const: brcm,bcm4908-pcie
131 reset-names:
133 - const: perst
136 - resets
137 - reset-names
138 - if:
142 const: brcm,bcm7216-pcie
148 reset-names:
150 - const: rescal
153 - resets
154 - reset-names
156 - if:
160 const: brcm,bcm7712-pcie
167 reset-names:
169 - const: rescal
170 - const: bridge
171 - const: swinit
174 - resets
175 - reset-names
180 - |
181 #include <dt-bindings/interrupt-controller/irq.h>
182 #include <dt-bindings/interrupt-controller/arm-gic.h>
185 #address-cells = <2>;
186 #size-cells = <1>;
188 compatible = "brcm,bcm2711-pcie";
191 #address-cells = <3>;
192 #size-cells = <2>;
193 #interrupt-cells = <1>;
196 interrupt-names = "pcie", "msi";
197 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
198 interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH
203 msi-parent = <&pcie0>;
204 msi-controller;
206 dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>,
208 brcm,enable-ssc;
209 brcm,scb-sizes = <0x0000000080000000 0x0000000080000000>;
213 #address-cells = <3>;
214 #size-cells = <2>;
218 vpcie3v3-supply = <&vreg7>;
222 pci-ep@0,0 {
223 assigned-addresses =