Lines Matching +full:synopsys +full:- +full:dw +full:- +full:mshc +full:- +full:common
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/samsung,exynos-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 Samsung Exynos SoC specific extensions to the Synopsys Designware Mobile
12 - Jaehoon Chung <[email protected]>
13 - Krzysztof Kozlowski <[email protected]>
18 - enum:
19 - axis,artpec8-dw-mshc
20 - samsung,exynos4210-dw-mshc
21 - samsung,exynos4412-dw-mshc
22 - samsung,exynos5250-dw-mshc
23 - samsung,exynos5420-dw-mshc
24 - samsung,exynos5420-dw-mshc-smu
25 - samsung,exynos7-dw-mshc
26 - samsung,exynos7-dw-mshc-smu
27 - items:
28 - enum:
29 - samsung,exynos5433-dw-mshc-smu
30 - samsung,exynos7885-dw-mshc-smu
31 - samsung,exynos850-dw-mshc-smu
32 - samsung,exynos8895-dw-mshc-smu
33 - const: samsung,exynos7-dw-mshc-smu
47 clock-names:
49 - const: biu
50 - const: ciu
52 samsung,dw-mshc-ciu-div:
59 samsung,dw-mshc-ddr-timing:
60 $ref: /schemas/types.yaml#/definitions/uint32-array
62 - description: CIU clock phase shift value for tx mode
65 - description: CIU clock phase shift value for rx mode
71 See also samsung,dw-mshc-hs400-timing property.
73 samsung,dw-mshc-hs400-timing:
74 $ref: /schemas/types.yaml#/definitions/uint32-array
76 - description: CIU clock phase shift value for tx mode
79 - description: CIU clock phase shift value for rx mode
86 - valid value for tx phase shift and rx phase shift is 0 to 7.
87 - when CIU clock divider value is set to 3, all possible 8 phase shift
89 - if CIU clock divider value is 0 (that is divide by 1), both tx and rx
91 If missing, values from samsung,dw-mshc-ddr-timing property are used.
93 samsung,dw-mshc-sdr-timing:
94 $ref: /schemas/types.yaml#/definitions/uint32-array
96 - description: CIU clock phase shift value for tx mode
99 - description: CIU clock phase shift value for rx mode
105 See also samsung,dw-mshc-hs400-timing property.
107 samsung,read-strobe-delay:
114 - compatible
115 - reg
116 - interrupts
117 - clocks
118 - clock-names
119 - samsung,dw-mshc-ddr-timing
120 - samsung,dw-mshc-sdr-timing
123 - $ref: synopsys-dw-mshc-common.yaml#
124 - if:
129 - samsung,exynos5250-dw-mshc
130 - samsung,exynos5420-dw-mshc
131 - samsung,exynos7-dw-mshc
132 - samsung,exynos7-dw-mshc-smu
133 - axis,artpec8-dw-mshc
136 - samsung,dw-mshc-ciu-div
141 - |
142 #include <dt-bindings/clock/exynos5420.h>
143 #include <dt-bindings/interrupt-controller/arm-gic.h>
146 compatible = "samsung,exynos5420-dw-mshc";
148 #address-cells = <1>;
149 #size-cells = <0>;
152 clock-names = "biu", "ciu";
153 fifo-depth = <0x40>;
154 card-detect-delay = <200>;
155 samsung,dw-mshc-ciu-div = <3>;
156 samsung,dw-mshc-sdr-timing = <0 4>;
157 samsung,dw-mshc-ddr-timing = <0 2>;
158 pinctrl-names = "default";
159 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_wp &sd2_bus1 &sd2_bus4>;
160 bus-width = <4>;
161 cap-sd-highspeed;
162 max-frequency = <200000000>;
163 vmmc-supply = <&ldo19_reg>;
164 vqmmc-supply = <&ldo13_reg>;
165 sd-uhs-sdr50;
166 sd-uhs-sdr104;
167 sd-uhs-ddr50;