Lines Matching +full:video +full:- +full:interfaces
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sm8250-camss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robert Foss <[email protected]>
17 const: qcom,sm8250-camss
23 clock-names:
25 - const: cam_ahb_clk
26 - const: cam_hf_axi
27 - const: cam_sf_axi
28 - const: camnoc_axi
29 - const: camnoc_axi_src
30 - const: core_ahb
31 - const: cpas_ahb
32 - const: csiphy0
33 - const: csiphy0_timer
34 - const: csiphy1
35 - const: csiphy1_timer
36 - const: csiphy2
37 - const: csiphy2_timer
38 - const: csiphy3
39 - const: csiphy3_timer
40 - const: csiphy4
41 - const: csiphy4_timer
42 - const: csiphy5
43 - const: csiphy5_timer
44 - const: slow_ahb_src
45 - const: vfe0_ahb
46 - const: vfe0_axi
47 - const: vfe0
48 - const: vfe0_cphy_rx
49 - const: vfe0_csid
50 - const: vfe0_areg
51 - const: vfe1_ahb
52 - const: vfe1_axi
53 - const: vfe1
54 - const: vfe1_cphy_rx
55 - const: vfe1_csid
56 - const: vfe1_areg
57 - const: vfe_lite_ahb
58 - const: vfe_lite_axi
59 - const: vfe_lite
60 - const: vfe_lite_cphy_rx
61 - const: vfe_lite_csid
67 interrupt-names:
69 - const: csiphy0
70 - const: csiphy1
71 - const: csiphy2
72 - const: csiphy3
73 - const: csiphy4
74 - const: csiphy5
75 - const: csid0
76 - const: csid1
77 - const: csid2
78 - const: csid3
79 - const: vfe0
80 - const: vfe1
81 - const: vfe_lite0
82 - const: vfe_lite1
92 interconnect-names:
94 - const: cam_ahb
95 - const: cam_hf_0_mnoc
96 - const: cam_sf_0_mnoc
97 - const: cam_sf_icp_mnoc
99 power-domains:
101 - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller.
102 - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller.
103 - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller.
113 $ref: /schemas/graph.yaml#/$defs/port-base
120 $ref: video-interfaces.yaml#
124 clock-lanes:
127 data-lanes:
132 - clock-lanes
133 - data-lanes
136 $ref: /schemas/graph.yaml#/$defs/port-base
143 $ref: video-interfaces.yaml#
147 clock-lanes:
150 data-lanes:
155 - clock-lanes
156 - data-lanes
159 $ref: /schemas/graph.yaml#/$defs/port-base
166 $ref: video-interfaces.yaml#
170 clock-lanes:
173 data-lanes:
178 - clock-lanes
179 - data-lanes
182 $ref: /schemas/graph.yaml#/$defs/port-base
189 $ref: video-interfaces.yaml#
193 clock-lanes:
196 data-lanes:
201 - clock-lanes
202 - data-lanes
205 $ref: /schemas/graph.yaml#/$defs/port-base
212 $ref: video-interfaces.yaml#
216 clock-lanes:
219 data-lanes:
224 - clock-lanes
225 - data-lanes
228 $ref: /schemas/graph.yaml#/$defs/port-base
235 $ref: video-interfaces.yaml#
239 clock-lanes:
242 data-lanes:
247 - clock-lanes
248 - data-lanes
254 reg-names:
256 - const: csiphy0
257 - const: csiphy1
258 - const: csiphy2
259 - const: csiphy3
260 - const: csiphy4
261 - const: csiphy5
262 - const: vfe0
263 - const: vfe1
264 - const: vfe_lite0
265 - const: vfe_lite1
267 vdda-phy-supply:
271 vdda-pll-supply:
276 - clock-names
277 - clocks
278 - compatible
279 - interconnects
280 - interconnect-names
281 - interrupts
282 - interrupt-names
283 - iommus
284 - power-domains
285 - reg
286 - reg-names
287 - vdda-phy-supply
288 - vdda-pll-supply
293 - |
294 #include <dt-bindings/interrupt-controller/arm-gic.h>
295 #include <dt-bindings/clock/qcom,camcc-sm8250.h>
296 #include <dt-bindings/interconnect/qcom,sm8250.h>
297 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
298 #include <dt-bindings/power/qcom-rpmpd.h>
301 #address-cells = <2>;
302 #size-cells = <2>;
305 compatible = "qcom,sm8250-camss";
317 reg-names = "csiphy0",
328 vdda-phy-supply = <&vreg_l5a_0p88>;
329 vdda-pll-supply = <&vreg_l9a_1p2>;
345 interrupt-names = "csiphy0",
360 power-domains = <&camcc IFE_0_GDSC>,
401 clock-names = "cam_ahb_clk",
452 interconnect-names = "cam_ahb",
458 #address-cells = <1>;
459 #size-cells = <0>;