Lines Matching +full:link +full:- +full:frequencies
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Bryan O'Donoghue <[email protected]>
15 - Automatic black level calibration (ABLC)
16 - Programmable controls for frame rate, mirror and flip, binning, cropping
18 - Output formats 10-bit 4C RGB RAW, 10-bit Bayer RAW
19 - 4-lane MIPI D-PHY TX @ 1 Gbps per lane
20 - 2-lane MPIP D-PHY TX @ 2 Gbps per lane
21 - Dynamic defect pixel cancellation
22 - Standard SCCB command interface
25 - $ref: /schemas/media/video-interface-devices.yaml#
37 avdd-supply:
40 dovdd-supply:
43 dvdd-supply:
46 reset-gpios:
50 $ref: /schemas/graph.yaml#/$defs/port-base
55 $ref: /schemas/media/video-interfaces.yaml#
59 data-lanes:
61 - items:
62 - const: 1
63 - const: 2
64 - items:
65 - const: 1
66 - const: 2
67 - const: 3
68 - const: 4
69 link-frequencies: true
70 remote-endpoint: true
73 - data-lanes
74 - link-frequencies
75 - remote-endpoint
78 - compatible
79 - reg
80 - clocks
81 - port
86 - |
87 #include <dt-bindings/gpio/gpio.h>
90 #address-cells = <1>;
91 #size-cells = <0>;
97 reset-gpios = <&tlmm 111 GPIO_ACTIVE_LOW>;
98 pinctrl-names = "default";
99 pinctrl-0 = <&cam_rgb_defaultt>;
103 assigned-clocks = <&ov08x40_clk>;
104 assigned-clock-parents = <&ov08x40_clk_parent>;
105 assigned-clock-rates = <19200000>;
107 avdd-supply = <&vreg_l7b_2p8>;
108 dvdd-supply = <&vreg_l7b_1p8>;
109 dovdd-supply = <&vreg_l3m_1p8>;
113 remote-endpoint = <&csiphy4_ep>;
114 data-lanes = <1 2 3 4>;
115 link-frequencies = /bits/ 64 <400000000>;