Lines Matching full:required

252 required:
276       # The reference to the memory controller is required to ensure that the
279       required:
301                 - description: bus clock required for downstream bus access and for
311                 - description: interface clock required to access smmu's registers
313                 - description: bus clock required for memory access
314                 - description: bus clock required for GPU memory access
323                 - description: interface clock required to access mnoc's registers
325                 - description: interface clock required to access smmu's registers
327                 - description: bus clock required for the smmu ptw
343                 - description: bus clock required for downstream bus access and for
353                 - description: interface clock required to access smmu's registers
355                 - description: bus clock required for memory access
356                 - description: bus clock required for GPU memory access
366                 - description: interface clock required to access mnoc's registers
368                 - description: interface clock required to access smmu's registers
370                 - description: bus clock required for downstream bus access
371                 - description: bus clock required for the smmu ptw
390             - description: bus clock required for downstream bus access and for
392             - description: interface clock required to access smmu's registers
445             - description: bus clock required for AHB bus access
446             - description: bus clock required for downstream bus access and for
448             - description: interface clock required to access smmu's registers
498             - description: Voter clock required for HLOS SMMU access
499             - description: Interface clock required for register access
612       required: