Lines Matching +full:access +full:- +full:controller +full:- +full:names
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/atmel,sama5d4-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip AT91 Extensible Direct Memory Access Controller
10 - Nicolas Ferre <[email protected]>
11 - Charan Pedumuru <[email protected]>
14 The DMA Controller (XDMAC) is a AHB-protocol central direct memory access
15 controller. It performs peripheral data transfer and memory move operations
18 or memory-to-memory transfers. The channel features are configurable at
22 - $ref: dma-controller.yaml#
27 - enum:
28 - atmel,sama5d4-dma
29 - microchip,sama7g5-dma
30 - items:
31 - enum:
32 - microchip,sam9x60-dma
33 - microchip,sam9x7-dma
34 - const: atmel,sama5d4-dma
36 "#dma-cells":
40 - bit 13: SIF (Source Interface Identifier) for memory interface.
41 - bit 14: DIF (Destination Interface Identifier) for peripheral interface.
42 - bit 30-24: PERID (Peripheral Identifier).
54 clock-names:
58 - compatible
59 - reg
60 - interrupts
61 - clocks
62 - clock-names
63 - "#dma-cells"
68 - |
69 #include <dt-bindings/clock/at91.h>
70 #include <dt-bindings/dma/at91.h>
71 #include <dt-bindings/interrupt-controller/irq.h>
72 dma-controller@f0008000 {
73 compatible = "atmel,sama5d4-dma";
76 #dma-cells = <1>;
78 clock-names = "dma_clk";