Lines Matching +full:clock +full:- +full:names
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Display Unit (DU)
10 - Laurent Pinchart <[email protected]>
13 These DT bindings describe the Display Unit embedded in the Renesas R-Car
14 Gen1, R-Car Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
19 - renesas,du-r8a7742 # for RZ/G1H compatible DU
20 - renesas,du-r8a7743 # for RZ/G1M compatible DU
21 - renesas,du-r8a7744 # for RZ/G1N compatible DU
22 - renesas,du-r8a7745 # for RZ/G1E compatible DU
23 - renesas,du-r8a77470 # for RZ/G1C compatible DU
24 - renesas,du-r8a774a1 # for RZ/G2M compatible DU
25 - renesas,du-r8a774b1 # for RZ/G2N compatible DU
26 - renesas,du-r8a774c0 # for RZ/G2E compatible DU
27 - renesas,du-r8a774e1 # for RZ/G2H compatible DU
28 - renesas,du-r8a7779 # for R-Car H1 compatible DU
29 - renesas,du-r8a7790 # for R-Car H2 compatible DU
30 - renesas,du-r8a7791 # for R-Car M2-W compatible DU
31 - renesas,du-r8a7792 # for R-Car V2H compatible DU
32 - renesas,du-r8a7793 # for R-Car M2-N compatible DU
33 - renesas,du-r8a7794 # for R-Car E2 compatible DU
34 - renesas,du-r8a7795 # for R-Car H3 compatible DU
35 - renesas,du-r8a7796 # for R-Car M3-W compatible DU
36 - renesas,du-r8a77961 # for R-Car M3-W+ compatible DU
37 - renesas,du-r8a77965 # for R-Car M3-N compatible DU
38 - renesas,du-r8a77970 # for R-Car V3M compatible DU
39 - renesas,du-r8a77980 # for R-Car V3H compatible DU
40 - renesas,du-r8a77990 # for R-Car E3 compatible DU
41 - renesas,du-r8a77995 # for R-Car D3 compatible DU
42 - renesas,du-r8a779a0 # for R-Car V3U compatible DU
43 - renesas,du-r8a779g0 # for R-Car V4H compatible DU
44 - renesas,du-r8a779h0 # for R-Car V4M compatible DU
49 # See compatible-specific constraints below.
51 clock-names: true
55 reset-names: true
57 power-domains:
65 The number of ports and their assignment are model-dependent. Each port
69 "^port@[0-3]$":
76 $ref: /schemas/types.yaml#/definitions/phandle-array
86 $ref: /schemas/types.yaml#/definitions/phandle-array
91 - description: phandle to VSP instance that serves the DU channel
92 - description: Channel index identifying the LIF instance in that VSP
98 - compatible
99 - reg
100 - clocks
101 - interrupts
102 - ports
105 - if:
109 const: renesas,du-r8a7779
115 - description: Functional clock
116 - description: DU_DOTCLKIN0 input clock
117 - description: DU_DOTCLKIN1 input clock
119 clock-names:
122 - const: du.0
123 - pattern: '^dclkin\.[01]$'
124 - pattern: '^dclkin\.[01]$'
143 - port@0
144 - port@1
147 - interrupts
149 - if:
154 - renesas,du-r8a7743
155 - renesas,du-r8a7744
156 - renesas,du-r8a7791
157 - renesas,du-r8a7793
163 - description: Functional clock for DU0
164 - description: Functional clock for DU1
165 - description: DU_DOTCLKIN0 input clock
166 - description: DU_DOTCLKIN1 input clock
168 clock-names:
171 - const: du.0
172 - const: du.1
173 - pattern: '^dclkin\.[01]$'
174 - pattern: '^dclkin\.[01]$'
182 reset-names:
184 - const: du.0
197 - port@0
198 - port@1
201 - clock-names
202 - interrupts
203 - resets
204 - reset-names
206 - if:
211 - renesas,du-r8a7745
212 - renesas,du-r8a7792
218 - description: Functional clock for DU0
219 - description: Functional clock for DU1
220 - description: DU_DOTCLKIN0 input clock
221 - description: DU_DOTCLKIN1 input clock
223 clock-names:
226 - const: du.0
227 - const: du.1
228 - pattern: '^dclkin\.[01]$'
229 - pattern: '^dclkin\.[01]$'
237 reset-names:
239 - const: du.0
251 - port@0
252 - port@1
255 - clock-names
256 - interrupts
257 - resets
258 - reset-names
260 - if:
265 - renesas,du-r8a7794
271 - description: Functional clock for DU0
272 - description: Functional clock for DU1
273 - description: DU_DOTCLKIN0 input clock
274 - description: DU_DOTCLKIN1 input clock
276 clock-names:
279 - const: du.0
280 - const: du.1
281 - pattern: '^dclkin\.[01]$'
282 - pattern: '^dclkin\.[01]$'
290 reset-names:
292 - const: du.0
305 - port@0
306 - port@1
309 - clock-names
310 - interrupts
311 - resets
312 - reset-names
314 - if:
319 - renesas,du-r8a77470
325 - description: Functional clock for DU0
326 - description: Functional clock for DU1
327 - description: DU_DOTCLKIN0 input clock
328 - description: DU_DOTCLKIN1 input clock
330 clock-names:
333 - const: du.0
334 - const: du.1
335 - pattern: '^dclkin\.[01]$'
336 - pattern: '^dclkin\.[01]$'
344 reset-names:
346 - const: du.0
360 - port@0
361 - port@1
362 - port@2
365 - clock-names
366 - interrupts
367 - resets
368 - reset-names
370 - if:
375 - renesas,du-r8a7742
376 - renesas,du-r8a7790
382 - description: Functional clock for DU0
383 - description: Functional clock for DU1
384 - description: Functional clock for DU2
385 - description: DU_DOTCLKIN0 input clock
386 - description: DU_DOTCLKIN1 input clock
387 - description: DU_DOTCLKIN2 input clock
389 clock-names:
392 - const: du.0
393 - const: du.1
394 - const: du.2
395 - pattern: '^dclkin\.[012]$'
396 - pattern: '^dclkin\.[012]$'
397 - pattern: '^dclkin\.[012]$'
405 reset-names:
407 - const: du.0
421 - port@0
422 - port@1
423 - port@2
426 - clock-names
427 - interrupts
428 - resets
429 - reset-names
431 - if:
436 - renesas,du-r8a7795
442 - description: Functional clock for DU0
443 - description: Functional clock for DU1
444 - description: Functional clock for DU2
445 - description: Functional clock for DU4
446 - description: DU_DOTCLKIN0 input clock
447 - description: DU_DOTCLKIN1 input clock
448 - description: DU_DOTCLKIN2 input clock
449 - description: DU_DOTCLKIN3 input clock
451 clock-names:
454 - const: du.0
455 - const: du.1
456 - const: du.2
457 - const: du.3
458 - pattern: '^dclkin\.[0123]$'
459 - pattern: '^dclkin\.[0123]$'
460 - pattern: '^dclkin\.[0123]$'
461 - pattern: '^dclkin\.[0123]$'
469 reset-names:
471 - const: du.0
472 - const: du.2
486 - port@0
487 - port@1
488 - port@2
489 - port@3
500 - clock-names
501 - interrupts
502 - resets
503 - reset-names
504 - renesas,vsps
506 - if:
511 - renesas,du-r8a774a1
512 - renesas,du-r8a7796
513 - renesas,du-r8a77961
519 - description: Functional clock for DU0
520 - description: Functional clock for DU1
521 - description: Functional clock for DU2
522 - description: DU_DOTCLKIN0 input clock
523 - description: DU_DOTCLKIN1 input clock
524 - description: DU_DOTCLKIN2 input clock
526 clock-names:
529 - const: du.0
530 - const: du.1
531 - const: du.2
532 - pattern: '^dclkin\.[012]$'
533 - pattern: '^dclkin\.[012]$'
534 - pattern: '^dclkin\.[012]$'
542 reset-names:
544 - const: du.0
545 - const: du.2
558 - port@0
559 - port@1
560 - port@2
571 - clock-names
572 - interrupts
573 - resets
574 - reset-names
575 - renesas,vsps
577 - if:
582 - renesas,du-r8a774b1
583 - renesas,du-r8a774e1
584 - renesas,du-r8a77965
590 - description: Functional clock for DU0
591 - description: Functional clock for DU1
592 - description: Functional clock for DU3
593 - description: DU_DOTCLKIN0 input clock
594 - description: DU_DOTCLKIN1 input clock
595 - description: DU_DOTCLKIN3 input clock
597 clock-names:
600 - const: du.0
601 - const: du.1
602 - const: du.3
603 - pattern: '^dclkin\.[013]$'
604 - pattern: '^dclkin\.[013]$'
605 - pattern: '^dclkin\.[013]$'
613 reset-names:
615 - const: du.0
616 - const: du.3
629 - port@0
630 - port@1
631 - port@2
642 - clock-names
643 - interrupts
644 - resets
645 - reset-names
646 - renesas,vsps
648 - if:
653 - renesas,du-r8a77970
654 - renesas,du-r8a77980
660 - description: Functional clock for DU0
661 - description: DU_DOTCLKIN0 input clock
663 clock-names:
666 - const: du.0
667 - const: dclkin.0
675 reset-names:
677 - const: du.0
689 - port@0
690 - port@1
696 - clock-names
697 - interrupts
698 - resets
699 - reset-names
700 - renesas,vsps
702 - if:
707 - renesas,du-r8a774c0
708 - renesas,du-r8a77990
709 - renesas,du-r8a77995
715 - description: Functional clock for DU0
716 - description: Functional clock for DU1
717 - description: DU_DOTCLKIN0 input clock
718 - description: DU_DOTCLKIN1 input clock
720 clock-names:
723 - const: du.0
724 - const: du.1
725 - pattern: '^dclkin\.[01]$'
726 - pattern: '^dclkin\.[01]$'
734 reset-names:
736 - const: du.0
750 - port@0
751 - port@1
752 - port@2
763 - clock-names
764 - interrupts
765 - resets
766 - reset-names
767 - renesas,vsps
769 - if:
774 - renesas,du-r8a779a0
775 - renesas,du-r8a779g0
780 - description: Functional clock
782 clock-names:
784 - const: du.0
792 reset-names:
794 - const: du.0
806 - port@0
807 - port@1
814 - clock-names
815 - interrupts
816 - resets
817 - reset-names
818 - renesas,vsps
820 - if:
825 - renesas,du-r8a779h0
830 - description: Functional clock
832 clock-names:
834 - const: du.0
842 reset-names:
844 - const: du.0
855 - port@0
861 - clock-names
862 - interrupts
863 - resets
864 - reset-names
865 - renesas,vsps
870 # R-Car H3 ES2.0 DU
871 - |
872 #include <dt-bindings/clock/renesas-cpg-mssr.h>
873 #include <dt-bindings/interrupt-controller/arm-gic.h>
876 compatible = "renesas,du-r8a7795";
886 clock-names = "du.0", "du.1", "du.2", "du.3";
888 reset-names = "du.0", "du.2";
894 #address-cells = <1>;
895 #size-cells = <0>;
900 remote-endpoint = <&adv7123_in>;
906 remote-endpoint = <&dw_hdmi0_in>;
912 remote-endpoint = <&dw_hdmi1_in>;
918 remote-endpoint = <&lvds0_in>;