Lines Matching +full:required +full:- +full:opps
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-dpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neil Armstrong <[email protected]>
12 $ref: /schemas/display/msm/dpu-common.yaml#
17 - qcom,sa8775p-dpu
18 - qcom,sm8650-dpu
19 - qcom,x1e80100-dpu
23 - description: Address offset and size for mdp register set
24 - description: Address offset and size for vbif register set
26 reg-names:
28 - const: mdp
29 - const: vbif
33 - description: Display hf axi
34 - description: Display MDSS ahb
35 - description: Display lut
36 - description: Display core
37 - description: Display vsync
39 clock-names:
41 - const: nrt_bus
42 - const: iface
43 - const: lut
44 - const: core
45 - const: vsync
47 required:
48 - compatible
49 - reg
50 - reg-names
51 - clocks
52 - clock-names
57 - |
58 #include <dt-bindings/interrupt-controller/arm-gic.h>
59 #include <dt-bindings/power/qcom,rpmhpd.h>
61 display-controller@ae01000 {
62 compatible = "qcom,sm8650-dpu";
65 reg-names = "mdp", "vbif";
72 clock-names = "nrt_bus",
78 assigned-clocks = <&dispcc_vsync_clk>;
79 assigned-clock-rates = <19200000>;
81 operating-points-v2 = <&mdp_opp_table>;
82 power-domains = <&rpmhpd RPMHPD_MMCX>;
84 interrupt-parent = <&mdss>;
88 #address-cells = <1>;
89 #size-cells = <0>;
94 remote-endpoint = <&dsi0_in>;
101 remote-endpoint = <&dsi1_in>;
106 mdp_opp_table: opp-table {
107 compatible = "operating-points-v2";
109 opp-200000000 {
110 opp-hz = /bits/ 64 <200000000>;
111 required-opps = <&rpmhpd_opp_low_svs>;
114 opp-325000000 {
115 opp-hz = /bits/ 64 <325000000>;
116 required-opps = <&rpmhpd_opp_svs>;
119 opp-375000000 {
120 opp-hz = /bits/ 64 <375000000>;
121 required-opps = <&rpmhpd_opp_svs_l1>;
124 opp-514000000 {
125 opp-hz = /bits/ 64 <514000000>;
126 required-opps = <&rpmhpd_opp_nom>;