Lines Matching +full:clock +full:- +full:frequency
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/samsung,mipi-dsim.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <[email protected]>
11 - Jagan Teki <[email protected]>
12 - Marek Szyprowski <[email protected]>
21 - enum:
22 - samsung,exynos3250-mipi-dsi
23 - samsung,exynos4210-mipi-dsi
24 - samsung,exynos5410-mipi-dsi
25 - samsung,exynos5422-mipi-dsi
26 - samsung,exynos5433-mipi-dsi
27 - fsl,imx8mm-mipi-dsim
28 - fsl,imx8mp-mipi-dsim
29 - items:
30 - enum:
31 - fsl,imx7d-mipi-dsim
32 - fsl,imx8mn-mipi-dsim
33 - const: fsl,imx8mm-mipi-dsim
41 '#address-cells':
44 '#size-cells':
51 clock-names:
55 samsung,phy-type:
57 description: phandle to the samsung phy-type
59 power-domains:
62 samsung,power-domain:
66 vddcore-supply:
69 vddio-supply:
72 samsung,burst-clock-frequency:
75 DSIM high speed burst mode frequency. If absent,
76 the pixel clock from the attached device or bridge
79 samsung,esc-clock-frequency:
82 DSIM escape mode frequency.
84 samsung,pll-clock-frequency:
87 DSIM oscillator clock frequency. If absent, the clock frequency
93 phy-names:
108 $ref: /schemas/graph.yaml#/$defs/port-base
116 $ref: /schemas/media/video-interfaces.yaml#
120 data-lanes:
127 lane-polarities:
135 lane-polarities: [data-lanes]
138 - clock-names
139 - clocks
140 - compatible
141 - interrupts
142 - reg
143 - samsung,esc-clock-frequency
146 - $ref: ../dsi-controller.yaml#
147 - if:
151 const: samsung,exynos5433-mipi-dsi
158 clock-names:
160 - const: bus_clk
161 - const: phyclk_mipidphy0_bitclkdiv8
162 - const: phyclk_mipidphy0_rxclkesc0
163 - const: sclk_rgb_vclk_to_dsim0
164 - const: sclk_mipi
168 - port@0
171 - ports
172 - vddcore-supply
173 - vddio-supply
175 - if:
179 const: samsung,exynos5410-mipi-dsi
186 clock-names:
188 - const: bus_clk
189 - const: pll_clk
192 - vddcore-supply
193 - vddio-supply
195 - if:
199 const: samsung,exynos4210-mipi-dsi
206 clock-names:
208 - const: bus_clk
209 - const: sclk_mipi
212 - vddcore-supply
213 - vddio-supply
215 - if:
219 const: samsung,exynos3250-mipi-dsi
226 clock-names:
228 - const: bus_clk
229 - const: pll_clk
232 - vddcore-supply
233 - vddio-supply
234 - samsung,phy-type
240 - |
241 #include <dt-bindings/clock/exynos5433.h>
242 #include <dt-bindings/gpio/gpio.h>
243 #include <dt-bindings/interrupt-controller/arm-gic.h>
246 compatible = "samsung,exynos5433-mipi-dsi";
250 phy-names = "dsim";
256 clock-names = "bus_clk",
261 power-domains = <&pd_disp>;
262 vddcore-supply = <&ldo6_reg>;
263 vddio-supply = <&ldo7_reg>;
264 samsung,burst-clock-frequency = <512000000>;
265 samsung,esc-clock-frequency = <16000000>;
266 samsung,pll-clock-frequency = <24000000>;
267 pinctrl-names = "default";
268 pinctrl-0 = <&te_irq>;
271 #address-cells = <1>;
272 #size-cells = <0>;
278 remote-endpoint = <&mic_to_dsi>;