Lines Matching full:clock

4 $id: http://devicetree.org/schemas/clock/qcom,mmcc.yaml#
7 title: Qualcomm Multimedia Clock & Reset Controller
14   Qualcomm multimedia clock control module provides the clocks, resets and
37   clock-names:
41   '#clock-cells':
55       Protected clock specifier list as per common clock binding
64   - '#clock-cells'
84             - description: PLL 3 clock
85             - description: PLL 3 Vote clock
86             - description: DSI phy instance 1 dsi clock
87             - description: DSI phy instance 1 byte clock
88             - description: DSI phy instance 2 dsi clock
89             - description: DSI phy instance 2 byte clock
90             - description: HDMI phy PLL clock
91             - description: LVDS PLL clock
93         clock-names:
117             - description: MMSS GPLL0 voted clock
118             - description: GPLL0 voted clock
119             - description: GPLL1 voted clock
120             - description: GFX3D clock source
121             - description: DSI phy instance 0 dsi clock
122             - description: DSI phy instance 0 byte clock
124         clock-names:
145             - description: MMSS GPLL0 voted clock
146             - description: GPLL0 voted clock
147             - description: GPLL1 voted clock
148             - description: GFX3D clock source
149             - description: DSI phy instance 0 dsi clock
150             - description: DSI phy instance 0 byte clock
151             - description: DSI phy instance 1 dsi clock
152             - description: DSI phy instance 1 byte clock
153             - description: HDMI phy PLL clock
154             - description: eDP phy PLL link clock
155             - description: eDP phy PLL vco clock
157         clock-names:
184             - description: MMSS GPLL0 voted clock
185             - description: GPLL0 clock
186             - description: GPLL0 voted clock
187             - description: GPLL1 clock
188             - description: DSI phy instance 0 dsi clock
189             - description: DSI phy instance 0 byte clock
190             - description: DSI phy instance 1 dsi clock
191             - description: DSI phy instance 1 byte clock
192             - description: HDMI phy PLL clock
193             - description: eDP phy PLL link clock
194             - description: eDP phy PLL vco clock
196         clock-names:
224         - clock-names
236             - description: Global PLL 0 clock
237             - description: MMSS NoC AHB clock
238             - description: GFX3D clock
239             - description: DSI phy instance 0 dsi clock
240             - description: DSI phy instance 0 byte clock
241             - description: DSI phy instance 1 dsi clock
242             - description: DSI phy instance 1 byte clock
243             - description: HDMI phy PLL clock
245         clock-names:
267             - description: Global PLL 0 clock
268             - description: MMSS NoC AHB clock
269             - description: DSI phy instance 0 dsi clock
270             - description: DSI phy instance 0 byte clock
271             - description: DSI phy instance 1 dsi clock
272             - description: DSI phy instance 1 byte clock
273             - description: HDMI phy PLL clock
275         clock-names:
296             - description: Global PLL 0 clock
297             - description: DSI phy instance 0 dsi clock
298             - description: DSI phy instance 0 byte clock
299             - description: DSI phy instance 1 dsi clock
300             - description: DSI phy instance 1 byte clock
301             - description: HDMI phy PLL clock
302             - description: DisplayPort phy PLL link clock
303             - description: DisplayPort phy PLL vco clock
304             - description: Global PLL 0 DIV clock
306         clock-names:
332             - description: Global PLL 0 clock
333             - description: Global PLL 0 DIV clock
334             - description: DSI phy instance 0 dsi clock
335             - description: DSI phy instance 0 byte clock
336             - description: DSI phy instance 1 dsi clock
337             - description: DSI phy instance 1 byte clock
338             - description: DisplayPort phy PLL link clock
339             - description: DisplayPort phy PLL vco clock
341         clock-names:
357     clock-controller@4000000 {
360       #clock-cells = <1>;