Lines Matching full:the
19 Modern processors are generally able to enter states in which the execution of
21 memory or executed. Those states are the *idle* states of the processor.
23 Since part of the processor hardware is not used in idle states, entering them
24 generally allows power drawn by the processor to be reduced and, in consequence,
28 the idle states of processors for this purpose.
33 CPU idle time management operates on CPUs as seen by the *CPU scheduler* (that
34 is the part of the kernel responsible for the distribution of computational
35 work in the system). In its view, CPUs are *logical* units. That is, they need
42 First, if the whole processor can only follow one sequence of instructions (one
43 program) at a time, it is a CPU. In that case, if the hardware is asked to
44 enter an idle state, that applies to the processor as a whole.
46 Second, if the processor is multi-core, each core in it is able to follow at
47 least one program at a time. The cores need not be entirely independent of each
48 other (for example, they may share caches), but still most of the time they
50 one program, those programs run mostly independently of each other at the same
51 time. The entire cores are CPUs in that case and if the hardware is asked to
52 enter an idle state, that applies to the core that asked for it in the first
54 that the core belongs to (in fact, it may apply to an entire hierarchy of larger
55 units containing the core). Namely, if all of the cores in the larger unit
56 except for one have been put into idle states at the "core level" and the
57 remaining core asks the processor to enter an idle state, that may trigger it
58 to put the whole larger unit into an idle state which also will affect the
62 program in the same time frame (that is, each core may be able to fetch
63 instructions from multiple locations in memory and execute them in the same time
65 the cores present themselves to software as "bundles" each consisting of
68 sequence of instructions. Then, the hardware threads are CPUs from the CPU idle
69 time management perspective and if the processor is asked to enter an idle state
70 by one of them, the hardware thread (or CPU) that asked for it is stopped, but
71 nothing more happens, unless all of the other hardware threads within the same
72 core also have asked the processor to enter an idle state. In that situation,
73 the core may be put into an idle state individually or a larger unit containing
74 it may be put into an idle state as a whole (if the other cores within the
81 *idle* by the Linux kernel when there are no tasks to run on them except for the
84 Tasks are the CPU scheduler's representation of work. Each task consists of a
86 running that code, and some context information that needs to be loaded into the
87 processor every time the task's code is run by a CPU. The CPU scheduler
88 distributes work by assigning tasks to run to the CPUs present in the system.
93 events to occur or similar). When a task becomes runnable, the CPU scheduler
94 assigns it to one of the available CPUs to run and if there are no more runnable
95 tasks assigned to it, the CPU will load the given task's context and run its
96 code (from the instruction following the last one executed so far, possibly by
101 The special "idle" task becomes runnable if there are no other runnable tasks
102 assigned to the given CPU and the CPU is then regarded as idle. In other words,
103 in Linux idle CPUs run the code of the "idle" task called *the idle loop*. That
104 code may cause the processor to be put into one of its idle states, if they are
105 supported, in order to save energy, but if the processor does not support any
106 idle states, or there is not enough time to spend in an idle state before the
107 next wakeup event, or there are strict latency constraints preventing any of the
108 available idle states from being used, the CPU will simply execute more or less
114 The Idle Loop
117 The idle loop code takes two major steps in every iteration of it. First, it
118 calls into a code module referred to as the *governor* that belongs to the CPU
120 the CPU to ask the hardware to enter. Second, it invokes another code module
121 from the ``CPUIdle`` subsystem, called the *driver*, to actually ask the
122 processor hardware to enter the idle state selected by the governor.
124 The role of the governor is to find an idle state most suitable for the
125 conditions at hand. For this purpose, idle states that the hardware can be
127 the platform or the processor architecture and organized in a one-dimensional
128 (linear) array. That array has to be prepared and supplied by the ``CPUIdle``
129 driver matching the platform the kernel is running on at the initialization
130 time. This allows ``CPUIdle`` governors to be independent of the underlying
131 hardware and to work with any platforms that the Linux kernel can run on.
134 taken into account by the governor, the *target residency* and the (worst-case)
135 *exit latency*. The target residency is the minimum time the hardware must
136 spend in the given state, including the time needed to enter it (which may be
138 the shallower idle states instead. [The "depth" of an idle state roughly
139 corresponds to the power drawn by the processor in that state.] The exit
140 latency, in turn, is the maximum time it will take a CPU asking the processor
141 hardware to enter an idle state to start executing the first instruction after a
142 wakeup from that state. Note that in general the exit latency also must cover
143 the time needed to enter the given state in case the wakeup occurs when the
147 There are two types of information that can influence the governor's decisions.
148 First of all, the governor knows the time until the closest timer event. That
149 time is known exactly, because the kernel programs timers and it knows exactly
150 when they will trigger, and it is the maximum time the hardware that the given
151 CPU depends on can spend in an idle state, including the time necessary to enter
152 and exit it. However, the CPU may be woken up by a non-timer event at any time
153 (in particular, before the closest timer triggers) and it generally is not known
154 when that may happen. The governor can only see how much time the CPU actually
155 was idle after it has been woken up (that time will be referred to as the *idle
156 duration* from now on) and it can use that information somehow along with the
157 time until the closest timer to estimate the idle duration in future. How the
159 and that is the primary reason for having more than one governor in the
163 ``ladder`` and ``haltpoll``. Which of them is used by default depends on the
164 configuration of the kernel and in particular on whether or not the scheduler
165 tick can be `stopped by the idle loop <idle-cpus-and-tick_>`_. Available
166 governors can be read from the :file:`available_governors`, and the governor
167 can be changed at runtime. The name of the ``CPUIdle`` governor currently
168 used by the kernel can be read from the :file:`current_governor_ro` or
172 Which ``CPUIdle`` driver is used, on the other hand, usually depends on the
173 platform the kernel is running on, but there are platforms with more than one
174 matching driver. For example, there are two drivers that can work with the
176 hardcoded idle states information and the other able to read that information
177 from the system's ACPI tables, respectively. Still, even in those cases, the
178 driver chosen at the system initialization time cannot be replaced later, so the
180 the ``acpi_idle`` driver will be used if ``intel_idle`` is disabled for some
181 reason or if it does not recognize the processor). The name of the ``CPUIdle``
182 driver currently used by the kernel can be read from the :file:`current_driver`
188 Idle CPUs and The Scheduler Tick
191 The scheduler tick is a timer that triggers periodically in order to implement
192 the time sharing strategy of the CPU scheduler. Of course, if there are
193 multiple runnable tasks assigned to one CPU at the same time, the only way to
195 share the available CPU time. Namely, in rough approximation, each task is
196 given a slice of the CPU time to run its code, subject to the scheduling class,
197 prioritization and so on and when that time slice is used up, the CPU should be
198 switched over to running (the code of) another task. The currently running task
199 may not want to give the CPU away voluntarily, however, and the scheduler tick
200 is there to make the switch happen regardless. That is not the only role of the
201 tick, but it is the primary reason for using it.
203 The scheduler tick is problematic from the CPU idle time management perspective,
204 because it triggers periodically and relatively often (depending on the kernel
205 configuration, the length of the tick period is between 1 ms and 10 ms).
206 Thus, if the tick is allowed to trigger on idle CPUs, it will not make sense
207 for them to ask the hardware to enter idle states with target residencies above
208 the tick period length. Moreover, in that case the idle duration of any CPU
209 will never exceed the tick period length and the energy used for entering and
210 exiting idle states due to the tick wakeups on idle CPUs will be wasted.
212 Fortunately, it is not really necessary to allow the tick to trigger on idle
213 CPUs, because (by definition) they have no tasks to run except for the special
214 "idle" one. In other words, from the CPU scheduler perspective, the only user
215 of the CPU time on them is the idle loop. Since the time of an idle CPU need
216 not be shared between multiple runnable tasks, the primary reason for using the
217 tick goes away if the given CPU is idle. Consequently, it is possible to stop
218 the scheduler tick entirely on idle CPUs in principle, even though that may not
219 always be worth the effort.
221 Whether or not it makes sense to stop the scheduler tick in the idle loop
222 depends on what is expected by the governor. First, if there is another
223 (non-tick) timer due to trigger within the tick range, stopping the tick clearly
224 would be a waste of time, even though the timer hardware may not need to be
225 reprogrammed in that case. Second, if the governor is expecting a non-timer
226 wakeup within the tick range, stopping the tick is not necessary and it may even
227 be harmful. Namely, in that case the governor will select an idle state with
228 the target residency within the time until the expected wakeup, so that state is
229 going to be relatively shallow. The governor really cannot select a deep idle
231 order. Now, if the wakeup really occurs shortly, stopping the tick would be a
232 waste of time and in this case the timer hardware would need to be reprogrammed,
233 which is expensive. On the other hand, if the tick is stopped and the wakeup
234 does not occur any time soon, the hardware may spend indefinite amount of time
235 in the shallow idle state selected by the governor, which will be a waste of
236 energy. Hence, if the governor is expecting a wakeup of any kind within the
237 tick range, it is better to allow the tick trigger. Otherwise, however, the
238 governor will select a relatively deep idle state, so the tick should be stopped
239 so that it does not wake up the CPU too early.
241 In any case, the governor knows what it is expecting and the decision on whether
242 or not to stop the scheduler tick belongs to it. Still, if the tick has been
243 stopped already (in one of the previous iterations of the loop), it is better
244 to leave it as is and the governor needs to take that into account.
246 The kernel can be configured to disable stopping the scheduler tick in the idle
247 loop altogether. That can be done through the build-time configuration of it
248 (by unsetting the ``CONFIG_NO_HZ_IDLE`` configuration option) or by passing
249 ``nohz=off`` to it in the command line. In both cases, as the stopping of the
250 scheduler tick is disabled, the governor's decisions regarding it are simply
251 ignored by the idle loop code and the tick is never stopped.
253 The systems that run kernels configured to allow the scheduler tick to be
255 generally regarded as more energy-efficient than the systems running kernels in
256 which the tick cannot be stopped. If the given system is tickless, it will use
257 the ``menu`` governor by default and if it is not tickless, the default
263 The ``menu`` Governor
266 The ``menu`` governor is the default ``CPUIdle`` governor for tickless systems.
267 It is quite complex, but the basic principle of its design is straightforward.
269 the CPU will ask the processor hardware to enter), it attempts to predict the
270 idle duration and uses the predicted value for idle state selection.
273 idle duration prediction. Namely, it saves the last 8 observed idle duration
274 values and, when predicting the idle duration next time, it computes the average
275 and variance of them. If the variance is small (smaller than 400 square
276 milliseconds) or it is small relative to the average (the average is greater
277 that 6 times the standard deviation), the average is regarded as the "typical
278 interval" value. Otherwise, the longest of the saved observed idle duration
279 values is discarded and the computation is repeated for the remaining ones.
280 Again, if the variance of them is small (in the above sense), the average is
281 taken as the "typical interval" value and so on, until either the "typical
283 the "typical interval" is assumed to equal "infinity" (the maximum unsigned
286 If the "typical interval" computed this way is long enough, the governor obtains
287 the time until the closest timer event with the assumption that the scheduler
288 tick will be stopped. That time, referred to as the *sleep length* in what follows,
289 is the upper bound on the time before the next CPU wakeup. It is used to determine
290 the sleep length range, which in turn is needed to get the sleep length correction
293 The ``menu`` governor maintains an array containing several correction factor
295 range represented in the array is approximately 10 times wider than the previous
298 The correction factor for the given sleep length range (determined before
299 selecting the idle state for the CPU) is updated after the CPU has been woken
300 up and the closer the sleep length is to the observed idle duration, the closer
301 to 1 the correction factor becomes (it must fall between 0 and 1 inclusive).
302 The sleep length is multiplied by the correction factor for the range that it
303 falls into to obtain an approximation of the predicted idle duration that is
304 compared to the "typical interval" determined previously and the minimum of
305 the two is taken as the idle duration prediction.
307 If the "typical interval" value is small, which means that the CPU is likely
308 to be woken up soon enough, the sleep length computation is skipped as it may
309 be costly and the idle duration is simply predicted to equal the "typical
312 Now, the governor is ready to walk the list of idle states and choose one of
313 them. For this purpose, it compares the target residency of each state with
314 the predicted idle duration and the exit latency of it with the with the latency
315 limit coming from the power management quality of service, or `PM QoS <cpu-pm-qos_>`_,
316 framework. It selects the state with the target residency closest to the predicted
317 idle duration, but still below it, and exit latency that does not exceed the
320 In the final step the governor may still need to refine the idle state selection
321 if it has not decided to `stop the scheduler tick <idle-cpus-and-tick_>`_. That
322 happens if the idle duration predicted by it is less than the tick period and
323 the tick has not been stopped already (in a previous iteration of the idle
324 loop). Then, the sleep length used in the previous computations may not reflect
325 the real time until the closest timer event and if it really is greater than
326 that time, the governor may need to select a shallower state with a suitable
332 The Timer Events Oriented (TEO) Governor
335 The timer events oriented (TEO) governor is an alternative ``CPUIdle`` governor
336 for tickless systems. It follows the same basic strategy as the ``menu`` `one
337 <menu-gov_>`_: it always tries to find the deepest idle state suitable for the
348 For the CPU idle time management purposes all of the physical idle states
349 supported by the processor have to be represented as a one-dimensional array of
351 the processor hardware to enter an idle state of certain properties. If there
352 is a hierarchy of units in the processor, one |struct cpuidle_state| object can
353 cover a combination of idle states supported by the units at different levels of
354 the hierarchy. In that case, the `target residency and exit latency parameters
355 of it <idle-loop_>`_, must reflect the properties of the idle state at the
356 deepest level (i.e. the idle state of the unit containing all of the other
360 a "module" and suppose that asking the hardware to enter a specific idle state
361 (say "X") at the "core" level by one core will trigger the module to try to
362 enter a specific idle state of its own (say "MX") if the other core is in idle
363 state "X" already. In other words, asking for idle state "X" at the "core"
364 level gives the hardware a license to go as deep as to idle state "MX" at the
365 "module" level, but there is no guarantee that this is going to happen (the core
367 Then, the target residency of the |struct cpuidle_state| object representing
368 idle state "X" must reflect the minimum time to spend in idle state "MX" of
369 the module (including the time needed to enter it), because that is the minimum
370 time the CPU needs to be idle to save any energy in case the hardware enters
371 that state. Analogously, the exit latency parameter of that object must cover
372 the exit time of idle state "MX" of the module (and usually its entry time too),
373 because that is the maximum delay between a wakeup signal and the time the CPU
374 will start to execute the first new instruction (assuming that both cores in the
375 module will always be ready to execute instructions as soon as the module
378 There are processors without direct coordination between different levels of the
380 state at the "core" level does not automatically affect the "module" level, for
381 example, in any way and the ``CPUIdle`` driver is responsible for the entire
382 handling of the hierarchy. Then, the definition of the idle state objects is
383 entirely up to the driver, but still the physical properties of the idle state
384 that the processor hardware finally goes into must always follow the parameters
385 used by the governor for idle state selection (for instance, the actual exit
386 latency of that idle state must not exceed the exit latency parameter of the
387 idle state object selected by the governor).
389 In addition to the target residency and exit latency idle state parameters
390 discussed above, the objects representing idle states each contain a few other
391 parameters describing the idle state and a pointer to the function to run in
392 order to ask the hardware to enter that state. Also, for each
395 statistics of the given idle state. That information is exposed by the kernel
398 For each CPU in the system, there is a :file:`/sys/devices/system/cpu/cpu<N>/cpuidle/`
399 directory in ``sysfs``, where the number ``<N>`` is assigned to the given
400 CPU at the initialization time. That directory contains a set of subdirectories
401 called :file:`state0`, :file:`state1` and so on, up to the number of idle state
402 objects defined for the given CPU minus one. Each of these directories
403 corresponds to one idle state object and the larger the number in its name, the
404 deeper the (effective) idle state represented by it. Each of them contains
405 a number of files (attributes) representing the properties of the idle state
409 Total number of times this idle state had been asked for, but the
415 a deeper idle state would have been a better match for the observed idle
419 Description of the idle state.
425 The default status of this state, "enabled" or "disabled".
428 Exit latency of the idle state in microseconds.
431 Name of the idle state.
438 Target residency of the idle state in microseconds.
441 Total time spent in this idle state by the given CPU (as measured by the
445 Total number of times the hardware has been asked by the given CPU to
449 Total number of times a request to enter this idle state on the given
452 The :file:`desc` and :file:`name` files both contain strings. The difference
453 between them is that the name is expected to be more concise, while the
455 The other files listed above contain integer numbers.
457 The :file:`disable` attribute is the only writeable one. If it contains 1, the
458 given idle state is disabled for this particular CPU, which means that the
459 governor will never select it for this particular CPU and the ``CPUIdle``
460 driver will never ask the hardware to enter it for that CPU as a result.
462 asked for by the other CPUs, so it must be disabled for all of them in order to
463 never be asked for by any of them. [Note that, due to the way the ``ladder``
465 selecting any idle states deeper than the disabled one too.]
467 If the :file:`disable` attribute contains 0, the given idle state is enabled for
468 this particular CPU, but it still may be disabled for some or all of the other
469 CPUs in the system at the same time. Writing 1 to it causes the idle state to
470 be disabled for this particular CPU and writing 0 to it allows the governor to
471 take it into consideration for the given CPU and the driver to ask for it,
472 unless that state was disabled globally in the driver (in which case it cannot
475 The :file:`power` attribute is not defined very well, especially for idle state
476 objects representing combinations of idle states at different levels of the
477 hierarchy of units in the processor, and it generally is hard to obtain idle
482 The number in the :file:`time` file generally may be greater than the total time
483 really spent by the given CPU in the given idle state, because it is measured by
484 the kernel and it may not cover the cases in which the hardware refused to enter
486 enter any idle state at all). The kernel can only measure the time span between
487 asking the hardware to enter an idle state and the subsequent wakeup of the CPU
488 and it cannot say what really happened in the meantime at the hardware level.
489 Moreover, if the idle state object in question represents a combination of idle
490 states at different levels of the hierarchy of units in the processor,
491 the kernel can never say how deep the hardware went down the hierarchy in any
492 particular case. For these reasons, the only reliable way to find out how
493 much time has been spent by the hardware in different idle states supported by
494 it is to use idle state residency counters in the hardware, if available.
496 Generally, an interrupt received when trying to enter an idle state causes the
497 idle state entry request to be rejected, in which case the ``CPUIdle`` driver
498 may return an error code to indicate that this was the case. The :file:`usage`
499 and :file:`rejected` files report the number of times the given idle state
507 The power management quality of service (PM QoS) framework in the Linux kernel
509 energy-efficiency features of the kernel to prevent performance from dropping
512 CPU idle time management can be affected by PM QoS in two ways, through the
513 global CPU latency limit and through the resume latency constraints for
515 the help of special internal interfaces provided by the PM QoS framework. User
516 space can modify the former by opening the :file:`cpu_dma_latency` special
518 signed 32-bit integer) to it. In turn, the resume latency constraint for a CPU
520 32-bit integer) to the :file:`power/pm_qos_resume_latency_us` file under
521 :file:`/sys/devices/system/cpu/cpu<N>/` in ``sysfs``, where the CPU number
522 ``<N>`` is allocated at the system initialization time. Negative values
523 will be rejected in both cases and, also in both cases, the written integer
526 The requested value is not automatically applied as a new constraint, however,
528 constraint previously requested by someone else. For this reason, the PM QoS
529 framework maintains a list of requests that have been made so far for the
531 applies the effective (minimum in this particular case) value as the new
534 In fact, opening the :file:`cpu_dma_latency` special device file causes a new
536 limit requests and the file descriptor coming from the "open" operation
537 represents that request. If that file descriptor is then used for writing, the
538 number written to it will be associated with the PM QoS request represented by
539 it as a new requested limit value. Next, the priority list mechanism will be
540 used to determine the new effective value of the entire list of requests and
542 new limit value will only change the real limit if the effective "list" value is
543 affected by it, which is the case if it is the minimum of the requested values
544 in the list.
546 The process holding a file descriptor obtained by opening the
547 :file:`cpu_dma_latency` special device file controls the PM QoS request
551 Closing the :file:`cpu_dma_latency` special device file or, more precisely, the
552 file descriptor obtained while opening it, causes the PM QoS request associated
553 with that file descriptor to be removed from the global priority list of CPU
554 latency limit requests and destroyed. If that happens, the priority list
555 mechanism will be used again, to determine the new effective value for the whole
556 list and that value will become the new limit.
559 the :file:`power/pm_qos_resume_latency_us` file under
562 process does that. In other words, this PM QoS request is shared by the entire
563 user space, so access to the file associated with it needs to be arbitrated
564 to avoid confusion. [Arguably, the only legitimate use of this mechanism in
565 practice is to pin a process to the CPU in question and let it use the
566 ``sysfs`` interface to control the resume latency constraint for it.] It is
568 determine the effective value to be set as the resume latency constraint for the
569 CPU in question every time the list of requests is updated this way or another
572 CPU idle time governors are expected to regard the minimum of the global
573 (effective) CPU latency limit and the effective resume latency constraint for
574 the given CPU as the upper limit for the exit latency of the idle states that
582 In addition to the ``sysfs`` interface allowing individual idle states to be
586 The ``cpuidle.off=1`` kernel command line option can be used to disable the
587 CPU idle time management entirely. It does not prevent the idle loop from
588 running on idle CPUs, but it prevents the CPU idle time governors and drivers
589 from being invoked. If it is added to the kernel command line, the idle loop
590 will ask the hardware to enter idle states on idle CPUs via the CPU architecture
592 That default mechanism usually is the least common denominator for all of the
593 processors implementing the architecture (i.e. CPU instruction set) in question,
597 The ``cpuidle.governor=`` kernel command line switch allows the ``CPUIdle``
599 the name of an available governor (e.g. ``cpuidle.governor=menu``) and that
600 governor will be used instead of the default one. It is possible to force
601 the ``menu`` governor to be used on the systems that use the ``ladder`` governor
604 The other kernel command line parameters controlling CPU idle time management
605 described below are only relevant for the *x86* architecture and references
608 The *x86* architecture support code recognizes three kernel command line
610 and ``idle=nomwait``. The first two of them disable the ``acpi_idle`` and
611 ``intel_idle`` drivers altogether, which effectively causes the entire
612 ``CPUIdle`` subsystem to be disabled and makes the idle loop invoke the
614 which of the two parameters is added to the kernel command line. In the
615 ``idle=halt`` case, the architecture support code will use the ``HLT``
616 instruction of the CPUs (which, as a rule, suspends the execution of the program
617 and causes the hardware to attempt to enter the shallowest available idle state)
621 CPUs from saving almost any energy at all may not be the only effect of it.
628 The ``idle=nomwait`` option prevents the use of ``MWAIT`` instruction of
629 the CPU to enter idle states. When this option is used, the ``acpi_idle``
630 driver will use the ``HLT`` instruction instead of ``MWAIT``. On systems
631 running Intel processors, this option disables the ``intel_idle`` driver
632 and forces the use of the ``acpi_idle`` driver instead. Note that in either
633 case, ``acpi_idle`` driver will function only if all the information needed
634 by it is in the system's ACPI tables.
636 In addition to the architecture-level kernel command line options affecting CPU
638 drivers that can be passed to them via the kernel command line. Specifically,
639 the ``intel_idle.max_cstate=<n>`` and ``processor.max_cstate=<n>`` parameters,
640 where ``<n>`` is an idle state index also used in the name of the given
642 `Representation of Idle States <idle-states-representation_>`_), causes the
643 ``intel_idle`` and ``acpi_idle`` drivers, respectively, to discard all of the
645 for any of those idle states or expose them to the governor. [The behavior of
646 the two drivers is different for ``<n>`` equal to ``0``. Adding
647 ``intel_idle.max_cstate=0`` to the kernel command line disables the
650 Also, the ``acpi_idle`` driver is part of the ``processor`` kernel module that