Lines Matching refs:splitStoreResp
102 val splitStoreResp = Flipped(Valid(new SqWriteBundle)) constant
204 val splitStoreResp = RegInit(VecInit(List.fill(maxSplitNum)(0.U.asTypeOf(new SqWriteBundle)))) constant
219 val hasException = io.splitStoreResp.bits.vecActive && !io.splitStoreResp.bits.need_rep &&
220 …ExceptionNO.selectByFu(io.splitStoreResp.bits.uop.exceptionVec, StaCfg).asUInt.orR || TriggerActio…
221 …val isUncache = (io.splitStoreResp.bits.mmio || io.splitStoreResp.bits.nc) && !io.splitStoreResp.b…
225 …io.sqControl.toStoreQueue.paddr := Cat(splitStoreResp(1).paddr(splitStoreResp(1).paddr.getWidth - …
258 when (io.splitStoreResp.valid) {
266 globalMMIO := io.splitStoreResp.bits.mmio
267 globalNC := io.splitStoreResp.bits.nc
268 } .elsewhen(io.splitStoreResp.bits.need_rep || (unSentStores & (~clearOh).asUInt).orR) {
555 when (io.splitStoreResp.valid) {
556 val resp = io.splitStoreResp.bits
557 splitStoreResp(curPtr) := io.splitStoreResp.bits
568 } .elsewhen (!io.splitStoreResp.bits.need_rep) {
660 val overwriteVaddr = RegEnable(splitStoreResp(curPtr).vaddr, shouldOverwrite)
661 val overwriteIsHyper = RegEnable(splitStoreResp(curPtr).isHyper, shouldOverwrite)
662 val overwriteGpaddr = RegEnable(splitStoreResp(curPtr).gpaddr, shouldOverwrite)
663 …val overwriteIsForVSnonLeafPTE = RegEnable(splitStoreResp(curPtr).isForVSnonLeafPTE, shouldOverwri…