noop,BPU: static branch prediction -> one-bit counter

* IPC: 0.530068 -> 0.544548

utils,ArrayTemplate: fix rresp

noop,Cache: enlarge size to 32KB

noop,BPU: change BTB to single port SRAM

noop,IDU: small optimization

noop,Cache: change DataArray to single port SRAM

noop,Cache: change MetaArray to single port SRAM

noop,BPU: use SyncReadMem for BTB

noop,CSR: display perfcnt in the right order

noop,CSR: add perfcnt for branch prediction

noop,IFU,BPU: merge all types of branch into one BTB

noop,IFU: access BPU by npc to let tables in BPU implemented by SRAM

noop,Cache: refactor meta array and data array

cache: use SyncReadMem

noop: move difftest and monitor

noop: use case class to manage and use implicit to pass global parameters

noop,CSR: use BoringUtils to connect perfcnts

update to chisel3.2

noop,LSU: improve timing

noop,BRU: move prediction checking to WBU to imporve timing

noop,IFU: add RAS, but it does not work well with small functions

* Some small functions will return quickly. `ret` is executed without
the correct return address pushed into RAS.

noop: improve IPC for ultraZ

* ultraZ gives better performance than zedboard

test,NOOPSim: do not add memory delay by default

utils,FlushableQueue: enq_ptr and dep_ptr are constant when entries == 0

noop,IFU: put branch predictor to the first stage