README.md (9b259174f81a9b059d729127b6ce2a574f00fc13) README.md (5c647eb53b68dd3583cfeec3625fabc3d69855a2)
1# NOOP
2
3NOOP(NJU Out-of-Order Processor) is a processor targeting super-scalar out-of-order execution.
4Currently it only supports riscv32.
5
6## Compile chisel code
7
8* Install `mill`. Refer to [the Manual section in this guide][mill].
9* Run `make` to generate verilog code. The output file is `build/TopMain.v`.
10
11[mill]: http://lihaoyi.com/mill#manual
12
13## Run programs by simulation
14
15* Set a new environment variable `NEMU_HOME` to the **absolute path** of the NEMU project.
16* Set a new environment variable `NOOP_HOME` to the **absolute path** of the NOOP project.
17* Clone the [AM project](https://github.com/NJU-ProjectN/nexus-am.git).
18* Set a new environment variable `AM_HOME` to the **absolute path** of the AM project.
1# NOOP
2
3NOOP(NJU Out-of-Order Processor) is a processor targeting super-scalar out-of-order execution.
4Currently it only supports riscv32.
5
6## Compile chisel code
7
8* Install `mill`. Refer to [the Manual section in this guide][mill].
9* Run `make` to generate verilog code. The output file is `build/TopMain.v`.
10
11[mill]: http://lihaoyi.com/mill#manual
12
13## Run programs by simulation
14
15* Set a new environment variable `NEMU_HOME` to the **absolute path** of the NEMU project.
16* Set a new environment variable `NOOP_HOME` to the **absolute path** of the NOOP project.
17* Clone the [AM project](https://github.com/NJU-ProjectN/nexus-am.git).
18* Set a new environment variable `AM_HOME` to the **absolute path** of the AM project.
19* Add a new AM `riscv32-noop` in the AM project if it is not provided.
20* Run the application in the AM project by `make ARCH=riscv32-noop run`.
19* Add a new AM `riscv64-noop` in the AM project if it is not provided.
20* Run the application in the AM project by `make ARCH=riscv64-noop run`.
21
21
22## Generate Vivado project
22## Run on FPGA
23
23
24### Sub-directories Overview
24```
25```
26fpga
27├── board # supported FPGA boards and files to build a Vivado project
28├── boot # PS boot flow of zynq and zynqmp
29├── lib # HDL sources shared by different boards
30├── Makefile
31├── Makefile.check
32└── noop.tcl # wrapper of NOOP core in the Vivado project
33```
34
35### Build a Vivado project
36
37* Install Vivado 2019.1, and source the setting of Vivado and SDK
38* Run the following command to build a Vivado project
39```
25cd fpga
40cd fpga
26make BOARD=zedboard PRJ=myproject
41make PRJ=myproject BOARD=axu3cg
27```
42```
28The project can be found at `fpga/board/zedboard/build/myproject-zedboard/`.
29Supported boards are listed under `fpga/board/`.
43Change `axu3cg` to the target board you want. Supported boards are listed under `board/`.
44The project will be created under `board/axu3cg/build/myproject-axu3cg`.
45* Open the project with Vivado and generate bitstream.
46
47### Prepare SD card
48
49Refer to the instructions of [fpga/boot/README.md](fpga/boot/README.md).
50
51NOTE: Remember to put the bitstream into BOOT.BIN, since the guide is going to boot everything from SD card.
52
53### Set your board to SD boot mode
54
55Please refer to the user guide of your board.
56* [zedboard](http://www.zedboard.org/sites/default/files/ZedBoard_HW_UG_v1_1.pdf)
57* [zcu102](https://www.xilinx.com/support/documentation/boards_and_kits/zcu102/ug1182-zcu102-eval-bd.pdf)
58* [sidewinder](http://sidewinder.fidus.com)
59* ultraZ (currently not avaliable to the public)
60* axu3cg (currently not avaliable to the public)
61
62### Boot linux in PS
63
64Just insert the SD card into the board, open a serial terminal and powerup the board.
65
66### Boot NOOP (the RISC-V subsystem)
67
68To boot the RISC-V subsystem
69* Send `fpga/resource/ddr-loader/ddr-loader.c` to PS.
70This can be achieved by either copying the file to SD card,
71or by sending the file with `scp` if you have your board connected to your host by network.
72* Compile the loader by gcc on PS.
73```
74gcc -O2 -o ddr-loader ddr-loader.c
75```
76* Send the RISC-V program (bin file, should start at 0x80000000) to PS.
77* Open minicom on PS to connect to the UART of NOOP.
78Note that you can connect to PS via `ssh` and use `tmux` to get multiple terminals.
79```
80minicom -D /dev/ttyUL1
81```
82* Use the loader to load the program to NOOP memory and start running NOOP.
83```
84./ddr-loader axu3cg bin-file
85```
86* To shutdown the board, first run `poweroff` in PS.