| README.md (0af3f74617cd9c3314a2d30006ddd7d5fcdcb215) | README.md (57bb43b5f11c3f1e89ac52f232fe73056b35d9bd) |
|---|---|
| 1# XiangShan 2 3XiangShan (香山) is an open-source high-performance RISC-V processor project. 4 5中文说明[在此](readme.zh-cn.md)。 6 | 1# XiangShan 2 3XiangShan (香山) is an open-source high-performance RISC-V processor project. 4 5中文说明[在此](readme.zh-cn.md)。 6 |
| 7Copyright 2020-2021 by Institute of Computing Technology, Chinese Academy of Sciences. | 7Copyright 2020-2022 by Institute of Computing Technology, Chinese Academy of Sciences. |
| 8 | 8 |
| 9Copyright 2020-2021 by Peng Cheng Laboratory. | 9Copyright 2020-2022 by Peng Cheng Laboratory. |
| 10 11## Docs and slides | 10 11## Docs and slides |
| 12We gave 20+ presentations on RISC-V World Conference China 2021. XiangShan tutorial was held at the same place. Our slides for RVWC2021 have been updated on [our doc repo](https://github.com/OpenXiangShan/XiangShan-doc) (in Chinese). | |
| 13 | 12 |
| 14我们在2021年RISC-V中国峰会的报告已经更新到[这里](https://github.com/OpenXiangShan/XiangShan-doc)。文档和相关信息也将持续更新到相同的仓库。 | 13[XiangShan-doc](https://github.com/OpenXiangShan/XiangShan-doc) is our official documentation repository. It contains design spec., technical slides, tutorial and more. |
| 15 | 14 |
| 15* Micro-architecture documentation of XiangShan has been published. Please check out https://xiangshan-doc.readthedocs.io 16 |
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| 16## Follow us 17 18Wechat/微信：香山开源处理器 19 20<div align=left><img width="340" height="117" src="images/wechat.png"/></div> 21 22Zhihu/知乎：[香山开源处理器](https://www.zhihu.com/people/openxiangshan) 23 24Weibo/微博：[香山开源处理器](https://weibo.com/u/7706264932) 25 26You can contact us through [our mail list](mailto:[email protected]). All mails from this list will be archived to [here](https://www.mail-archive.com/[email protected]/). 27 28## Architecture 29 30The first stable micro-architecture of XiangShan is called Yanqihu (雁栖湖) on this [branch](https://github.com/OpenXiangShan/XiangShan/tree/yanqihu), which has been developed since June 2020. The current version of XiangShan, also known as Nanhu (南湖), is still under development on the master branch. 31 | 17## Follow us 18 19Wechat/微信：香山开源处理器 20 21<div align=left><img width="340" height="117" src="images/wechat.png"/></div> 22 23Zhihu/知乎：[香山开源处理器](https://www.zhihu.com/people/openxiangshan) 24 25Weibo/微博：[香山开源处理器](https://weibo.com/u/7706264932) 26 27You can contact us through [our mail list](mailto:[email protected]). All mails from this list will be archived to [here](https://www.mail-archive.com/[email protected]/). 28 29## Architecture 30 31The first stable micro-architecture of XiangShan is called Yanqihu (雁栖湖) on this [branch](https://github.com/OpenXiangShan/XiangShan/tree/yanqihu), which has been developed since June 2020. The current version of XiangShan, also known as Nanhu (南湖), is still under development on the master branch. 32 |
| 32The micro-architecture overview is shown below. | 33The micro-architecture overview of Nanhu (南湖) is shown below. |
| 33 | 34 |
| 34 | 35 |
| 35 36 37 38## Sub-directories Overview 39 40Some of the key directories are shown below. 41 42``` 43. | 36 37 38 39## Sub-directories Overview 40 41Some of the key directories are shown below. 42 43``` 44. |
| 44├── ready-to-run # pre-built simulation images | 45├── src 46│ └── main/scala # design files 47│ ├── device # virtual device for simulation 48│ ├── system # SoC wrapper 49│ ├── top # top module 50│ ├── utils # utilization code 51│ ├── xiangshan # main design code 52│ └── xstransforms # some useful firrtl transforms |
| 45├── scripts # scripts for agile development | 53├── scripts # scripts for agile development |
| 46└── src 47 ├── test # test files (including diff-test, module-test, etc.) 48 └── main/scala # design files 49 ├── device # virtual device for simulation 50 ├── difftest # diff-test chisel interface 51 ├── system # SoC wrapper 52 ├── top # top module 53 ├── utils # utilization code 54 ├── xiangshan # main design code 55 └── xstransforms # some useful firrtl transforms | 54├── fudian # floating unit submodule of XiangShan 55├── huancun # L2/L3 cache submodule of XiangShan 56├── difftest # difftest co-simulation framework 57└── ready-to-run # pre-built simulation images |
| 56``` 57 58## IDE Support 59 60### bsp 61``` 62make bsp 63``` --- 41 unchanged lines hidden (view full) --- 105 106## Acknowledgement 107 108In the development of XiangShan, some sub-modules from the open-source community are employed. All relevant usage is listed below. 109 110| Sub-module | Source | Detail | 111| ------------------ | ------------------------------------------------------------ | ------------------------------------------------------------ | 112| L2 Cache/LLC | [Sifive block-inclusivecache](https://github.com/ucb-bar/block-inclusivecache-sifive) | Our new L2/L3 design are inspired by Sifive's `block-inclusivecache`. | | 58``` 59 60## IDE Support 61 62### bsp 63``` 64make bsp 65``` --- 41 unchanged lines hidden (view full) --- 107 108## Acknowledgement 109 110In the development of XiangShan, some sub-modules from the open-source community are employed. All relevant usage is listed below. 111 112| Sub-module | Source | Detail | 113| ------------------ | ------------------------------------------------------------ | ------------------------------------------------------------ | 114| L2 Cache/LLC | [Sifive block-inclusivecache](https://github.com/ucb-bar/block-inclusivecache-sifive) | Our new L2/L3 design are inspired by Sifive's `block-inclusivecache`. | |
| 113| Diplomacy/TileLink | [Rocket-chip](https://github.com/chipsalliance/rocket-chip) | We reused the diplomacy framework and TileLink utility that exist in rocket-chip to negotiate bus. | | 115| Diplomacy/TileLink | [Rocket-chip](https://github.com/chipsalliance/rocket-chip) | We reused the Diplomacy framework and TileLink utility that exist in rocket-chip to negotiate bus. | |
| 114 115We are grateful for the support of the open-source community and encourage other open-source projects to reuse our code within the scope of the [license](LICENSE). 116 | 116 117We are grateful for the support of the open-source community and encourage other open-source projects to reuse our code within the scope of the [license](LICENSE). 118 |